Data communications subsystem

• US 4,156,907 A
• Filed: 05/15/1978
• Issued: 05/29/1979
• Est. Priority Date: 03/02/1977
• Status: Expired due to Term

• Current Assignee: Unisys Corporation
• Original Assignee: Burroughs Incorporated (Terreno Realty Corp.)
• Inventors: Rawlings, Robert L., Watson, Morris G.
• Primary Examiner(s): Springborn, Harvey E.
• Application Number:
  US05/905,885
• Time in Patent Office: 379 Days
• Field of Search: 364/200 MS File
• US Class Current: 709/212
• CPC Class Codes: G06F 13/128 for dedicated transfers to a network for protocol converters G06F13/387
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

A data communications subsystem operates with a main host computer having a central processor and main memory. The subsystem comprises: A data communications processor having its own internal memory for storing data transfer routines; and autonomous memory dedicated to storing data transfer instructions and control data; and a basic control module which includes a basic control interface unit connecting a plurality of front-end controllers. The basic control interface unit provides memory access paths for the front-end controllers to access data communications memory resources. The data communications processor provides address pointers to each of the front-end controllers whereby the selected front-end controller may access data transfer instructions from a data communications memory resource and then execute these instructions. The data transfer instructions are stored in "command blocks" in a memory resource and are made accessible to the front-end controllers for execution of data transfer operations. In a "non-autonomous configuration" the host system main memory is used for storage of command blocks and control data. This configuration is used with the type of front-end controllers known as broadband controllers using high speed transmission lines connected to peripherals and adapter cluster module controllers. In an "autonomous" configuration, the command blocks are stored in autonomous memory and the front-end controllers may include, in addition, an added mix of a data communications disk controller (DCDC) for data storage on disk, and a store-to-store controller (SSC) for transfer of data between autonomous memory and the main memory independently of the data communications processor.

Claims

1. A data communications subsystem including a data communications processor, a data communications memory resource using an autonomous memory for autonomous configurations and main host system memory for non-autonomous configurations, and a basic control module which connects to remote peripheral units, said data communications subsystem operating in connection with a main host system having a main central processor and main memory, said data communications subsystem comprising:

(a) said data communications processor being initiated by said main host system and including;

(a1) a local internal memory for storage of data transfer routines;

(a2) a plurality of cluster-interface hubs, each of which hubs is connected to either;

(i) a plurality of adapter-cluster module controllers, or

(ii) said basic control module having a basic control interface unit and a plurality of front-end controllers;

(a3) means to initiate, stop or interrogate each of said plurality of front-end controllers in the subsystem;

(a4) means to assemble and convey, to a selected front-end controller, an address of specific instruction-commands regarding data-transfer operations;

(a5) means to sense any halt in the main host system and thereupon to operate the data communications subsystem in an autonomous self-running mode during such halt period wherein input messages from peripherals and output messages from the main system are stored on disk files, and wherein said output messages are transferred to their destinations even when the main system is off-line, and said input messages are transformed to the main system from disk files when the main system is on-line again;

(b) said autonomous memory having direct access said basic control interface unit, said autonomous memory storing control data and information data dedicated to data transfer operations for use of said front-end controllers;

(c) said basic control module including;

(c1) a basic control interface unit, under control of said data communications processor, providing means to connecting said main host memory in non-autonomous subsystem configurations or means connecting said autonomous memory in autonomous subsystem configurations;

(c2) a plurality of front-end controllers each of which connects, via transmission lines, to one or more peripheral units, each of said front-end controllers being linked to said basic control interface unit for access to main host memory or autonomous memory, each of said front-end controllers including;

(c2a) means to receive data communication transfer instructions, after initiation by and receipt of instruction address-data from said data communications processor, said data transfer instructions being accessed from said main host memory, or said autonomous data communications memory;

(c2b) means to execute data transfer instructions for data transfers from/to peripheral units connected to each of said front-end controllers;

(c2c) program routine means for providing the specific line control disciplines and protocol required by the peripheral units connected to each of said front-end controllers;

(c2d) connection means to one or more peripheral units.

2. The data communications subsystem of claim 1 wherein said basic control interface unit includes:

(c1a) an interface path means to said data communications processor;

(c1b) an interface path means connected to main host memory in a non-autonomous configuration and connected to a local autonomous memory in an autonomous configuration;

(c1c) an interface path means to each of said plurality of front-end controllers;

(c1d) priority resolution means for selecting priority of access to memory among competing front-end controllers.

3. The data communications subsystem of claim 2 wherein said basic control interface unit includes:

(c1e) interface path means to said data communications processor to provide access to said autonomous memory by said data communications processor via said basic control interface unit.

4. The data communications subsystem of claim 1 wherein said plurality of front-end controllers connected to said basic control interface unit may, in the autonomous configuration, include any mix of:

(i) broadband controllers providing data transfers on high-speed transmission lines;

(ii) adapter cluster module controllers providing data transfers on low/medium speed transmission lines;

(iii) a data communications disk controller for data transfers to/from disk files;

(iv) a store-to-store controller to transfer data, between main host memory and autonomous memory, independently of said data communications processor after initialization of said store-to-store controller by said data communications processor.

5. A network of a first data communications subsystem, as in claim 1, and a second data communications subsystem as in claim 1, both subsystems connected to a main host system having a central processing unit and main memory, said first and second subsystem having first and second data communications processors and first and second basic control interface units, said network including:

(a) first connection means from said first data communications processor to said second basic control interface unit;

(b) second connection means from said second data communications processor to said first basic control interface unit;

whereby any failure in said first or second data communications processor will result in the surviving data communications processor assuming control of data transfer operations for both of said first and second subsystems via said first and second basic control interface units.

6. The network of claim 5 wherein each of said basic control interface unit includes:

(c1a) exchange means connected to a first and second data communications processor;

(c1b) exchange control means for selecting one of said data communications processors for communication with a selected front-end controller;

(c1c) priority logic unit means connected to said front-end controllers, for selecting priority of access to memory by a requesting front-end controller;

(c1d) interface path means connecting said priority logic means to each of said plurality of front-end controllers in a predetermined sequence;

(c1e) a local memory interface connected to a data communications processor to permit said data communications processor to access said autonomous memory via the basic control interface unit;

(c1f) logic means within said exchange means for providing an interrupt signal to a selected data communications processor from each front-end controller which has completed a data transfer operation or when it needs re-initialization because of an error signal.

7. A data communication subsystem for use with a main host system which has a central processor and a main memory, wherein said data communication subsystem connects a plurality of peripheral terminals and provides the capability of operating continuously and autonomously during any periods when the main host system is halted, the data communication subsystem comprising:

(a) a data communications processor connected to said main host system and capable of receiving commands for initiation of data transfer operations, said data communications processor including;

(a1) local internal memory means for storing program routines;

(a2) means to convey an address of instruction commands to each of a plurality of front-end controllers;

(a3) means to initiate, stop or interrogate each front-end controller regarding data transfer operations;

(a4) means to detect any halt in the main host system and thereupon to operate the data communications subsystem in an autonomously independent self-running mode during such halt period wherein a local autonomous data communications memory is used as a source of instruction data and control data during said autonomous mode;

(b) an autonomous data communications memory for storage of programs, control data and information data dedicated to the operation of data transfers in the data communications memory storing command blocks for execution of data transfers within the subsystem;

(c) a plurality of command blocks stored in autonomous memory, said command blocks including;

(c1) execution instructions for a data transfer operation to a specified front-end controller;

(c2) an address of message data;

(c3) length of the message data;

(c4) memory space for a result word to indicate completion or incompletion of the data transfer operation;

(d) a basic control module connecting a plurality of front-end controllers, said basic control module including;

(d1) a basic control interface unit providing direct connecting to said local autonomous data communications memory and to said data communications processor;

(d2) a plurality of front-end controllers each of which is connected to said basic control interface unit, each of said front-end controllers including;

(d2a) means to receive data communication transfer instructions, after initiation by and receipt of instruction address-data from said data communications processor, said data transfer instructions being accessed from said autonomous data communications memory;

(d2b) means to execute data transfer instructions for data transfers from/to peripheral terminal units connected to said front-end controller;

(d2c) program routine logic means for providing the specific line control disciplines and protocol required by the peripheral terminal units connected to said front-end controller;

(d2d) connection means to one or more peripheral terminal devices;

(e) said data communications processor providing addresses, via the basic control unit, to each of its associated front-end controllers to permit each of said front-end controllers to access instruction data and control data for the execution of data transfer operations, said instruction and control data being available in said command blocks in said autonomous memory.

8. The data communications subsystem of claim 7 in which said plurality of front-end controllers may include any mix of:

(i) a broad band controller for peripherals connected via high speed transmission lines;

(ii) an adapter cluster module controller for connecting a plurality of peripherals via low/medium speed data transmission lines;

(iii) a data communications disk controller for routing data into disk file storage or out of disk file storage;

9. The data communications subsystem of claim 7 wherein said plurality of front-end controllers comprise broad band controllers for data transfer to peripheral terminals on high speed transmission lines.

10. The data communications subsystem of claim 7 wherein said plurality of front-end controllers comprise adapter cluster module controllers for data transfer to peripheral terminals on low/medium speed transmission lines.

11. A data communication subsystem for use with a main host system which has a central processor and a main memory, wherein said data communication subsystem connects a plurality of peripheral terminals and provides the capability of operating continuously and autonomously during any periods when the main host system is halted, the data communication subsystem comprising:

(a) a data communications processor connected to said main host system and initiated by said main system for data transfer operations, said data communications processor including;

(a1) local memory means for storing instruction routines for data communications processor operations;

(a2) means to convey an address of an instruction-command-block to each of a plurality of front-end controllers;

(a3) means to initiate, stop or interrogate each front-end controller regarding data transfer operations;

(a4) means to detect any halt in the main host system and thereupon to operate the data communications subsystem into an autonomously independent self-running mode during such halt period;

(b) an autonomous data communications memory for storage of programs, instruction-command blocks, control data and messages dedicated to the operation of data transfers in the data communications subsystem;

(c) a basic control module connected to said data communications processor and said autonomous memory, said basic control module comprising;

(c1) a basic control interface unit connecting to a plurality of front-end controllers and including;

(c1a) a control interface to a first data communications processor;

(c1b) a data interface connected to said autonomous memory;

(c1c) an interface to said plurality of front-end controllers;

(c1d) priority resolution means for selecting priority of access to memory among competing front-end controllers;

(c2) a plurality of front-end controllers where each of said front-end controllers includes;

(c2a) means for accessing an instruction-block from said autonomous memory according to addresses provided by the data communications processor via the basic control interface unit;

(c2b) connection means to one or more peripheral terminals;

(c2c) execution means for executing data transfers between a selected front-end controller and its associated peripheral terminals, and/or between said front-end controller and the said autonomous memory;

(c2d) means to provide a predetermined line control discipline and protocol for data transfers between a selected front-end controller and its associated peripheral terminals;

12. The data communications subsystem of claim 11 wherein said front-end controllers include:

(c2e) means to handle data transfers on high speed transmission lines;

(c2f) means to handle data transfers on medium/low speed transmission lines.

13. The data communications subsystem of claim 11 which includes:

(d) disk file storage means, and wherein one of said plurality of front-end controllers includes;

(c2g) means to execute data transfers to disk files during the said autonomous mode of operation when said main system may be halted.

14. The data communications subsystem of claim 11 wherein one of said plurality of front-end controllers includes:

(c2h) means to transfer data between main host memory and local autonomous memory.

15. The data communications subsystem of claim 14 wherein one of said plurality of front-end controllers includes:

(c2i) means to transfer data from one area of autonomous memory to another area of autonomous memory.