Correlator/convolver using a second shift register to rotate sample values

• US 4,161,033 A
• Filed: 12/22/1977
• Issued: 07/10/1979
• Est. Priority Date: 12/22/1977
• Status: Expired due to Term

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: RCA Corporation
• Inventors: Martinson, Lloyd W.
• Primary Examiner(s): Gruber, Felix D.
• Application Number:
  US05/863,233
• Time in Patent Office: 565 Days
• Field of Search: 364/604, 364/728, 364/824, 364/862
• US Class Current: 708/421
• CPC Class Codes: G06F 17/15 Correlation function computation including computation of convolution operations arithmetic circuits for sum of products per se, e.g. multiply-accumulators G06F7/5443; digital filters, e.g. FIR, IIR, adaptive filters H03H17/00

Abstract

Circular correlator/convolver for discrete sample signals having a first shift register to receive the sample signals in series and a second shift register to receive the sample signals, in parallel, from the first register to circulate these signals in the second register, and once each shfit period, to apply the n signals it is storing to a group of n multipliers, Each multiplier receives also a second signal which serves as a second operand and is multiplied with the signal received from the second shift register. The correlated/convolved values are produced in response to the product signals generated by the multipliers during the time a following group of sample signals is being read into the first shift register. The design is suitable for implementing with charge-coupled devices on a single substrate.

Claims

1. A digital convolver/correlator comprising, in combination:

input means for supplying first input signals at a predetermined rate;

signal source means for supplying first shift signals at said predetermined rate;

serial in and parallel out first shift register means having a plurality of at least n first stages for receiving the first input signals and serially shifting said first input signals from stage to stage in response to said first shift signals;

transfer signal means for producing a transfer signal each time said first shift register means has received n input signals;

serial and parallel in and parallel out second shift register means having a plurality of n second stages with the signal output terminal of its final stage coupled to the signal input terminal of its first stage for enabling rotation of said first input signals through said second stages thereof;

transmission means responsive to said transfer signal for transferring the said first input signals in parallel manner from the stages of said first shift register means to corresponding stages of said second shift register means;

said signal source means constructed to supply to said second shift register means second shift signals for rotating the input signals from stage to stage therein at a rate not less than approximately said predetermined rate;

means providing a plurality of second input signals;

a plurality of multiplier means, each coupled to receive as a first input operand the first input signal from a different stage of said second shift register means and as a second input operand one of said second input signals to produce a product signal representative of the value of the first input signal applied thereto times the value of the second input signal applied thereto; and

summing means responsive to the product signals from said plurality of multiplier means for producing output signals.

2. The invention as claimed in claim 1 wherein said first and second shift register means comprise charge coupled device shift register means.