Photographic camera control circuitry

• US 4,161,355 A
• Filed: 02/03/1978
• Issued: 07/17/1979
• Est. Priority Date: 02/14/1977
• Status: Expired due to Term

• Current Assignee: Minolta Camera Kabushiki Kaisha
• Original Assignee: Minolta Camera Kabushiki Kaisha
• Inventors: Nakai, Masaaki, Sahara, Masayoshi
• Primary Examiner(s): Hix, L. T.
• Assistant Examiner(s): Perkey, William B.
• Application Number:
  US05/875,074
• Time in Patent Office: 529 Days
• Field of Search: 354/24, 354/29, 354/30, 354/36, 354/38, 354/51, 354/60 R, 354/238, 354/258, 354/267, 354/50
• US Class Current: 396/252
• CPC Class Codes: G03B 7/083 for control of exposure time
• CPC Class Codes: G03B 7/087 for control of both exposure time and aperture
• CPC Class Codes: G03B 7/089 for storage of exposure value in mirror reflex cameras

Abstract

In a photographic camera control circuitry which energizes an electromagnetic means for initiating a camera operation or an exposure sequence, measures brightness of the scene to be photographed and controls exposure time automatically in accordance with the scene brightness measured and stored in a storing device, a sequence control circuit arrangement includes a first energization circuit responsive to a closure of a release or trigger switch to at first energize the light measuring circuit and a delay circuit which outputs a signal after a lapse of given time from the closure of the release switch, and further includes a second energization circuit for energizing the electromagnetic means and an exposure control circuit in response to the signal from the delay circuit.

Claims

1. A photographic camera control circuitry comprising:

a light measuring circuit for generating a light representative signal, said light measuring circuit including a photocell receiving light of the scene to be photographed, through a camera objective and a diaphragm aperture;

storing means for storing said light representative signal;

storage switch means for connecting and disconnecting said storing means to or from said light measuring circuit;

exposure time control means for initiating shutter closing at a time commensurate with the signal stored in said storing means;

a first control circuit for energizing said light measuring circuit and actuating said storage switch means to connect said storing means to said light measuring circuit;

a second control circuit for energizing said exposure time control means and for deactuating said storage switch means to disconnect said storing means from said light measuring circuit;

delay means for generating an output after a lapse of a given time period from the actuation thereof;

electromagnetic means for actuating a camera mechanism to initiate an exposure sequence;

a third control circuit for energizing said electromagnetic means;

a first switch means for actuating said first control circuit; and

second switch means for actuating said first control circuit and said delay means, said delay means being connected with said second and third control circuits so that both said circuits are actuated in response to the output of said delay means.

2. The photographic camera control circuitry as set forth in claim 1 further comprising a self-maintaining circuit for maintaining energization of said delay circuit even after said first switch means are deactuated;

and

release means for opening said self-maintaining circuit in response to a termination of exposure.

3. The photographic camera control circuitry as set forth in claim 2 wherein said second switch means is responsive to operation of a shutter release button.

4. The photographic camera control circuitry as set forth in claim 2 further comprising third switch means responsive to an operation of a remote controller.

5. The photographic camera control circuitry as set forth in claim 2 wherein said release means includes a fourth switch closeable in response to completion of shutter cocking and openable in response to termination of shutter operation.

6. The photographic camera control circuitry as set forth in claim 3 wherein said self-maintaining circuit includes a biasing member connected in series with said second switch means, a first transistor having its base connected with said biasing member to be biased thereby, and a second transistor having its base connected to said first transistor to be energized thereby and having its emitter-collector connected in parallel with said second switch means.