Count-down addressing system

• US 4,161,634 A
• Filed: 07/31/1978
• Issued: 07/17/1979
• Est. Priority Date: 07/31/1978
• Status: Expired due to Term

• Current Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Original Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Inventors: Bellisio, Jules A.
• Primary Examiner(s): Claffy, Kathleen H.
• Assistant Examiner(s): Brigance, Gerald L.
• Application Number:
  US05/929,431
• Time in Patent Office: 351 Days
• Field of Search: 179/175.31 R, 179/175.3 R, 179/175, 179/175.3 F, 179/15 AL, 179/15 BF, 179/15 BL, 179/2 R, 179/2 A, 179/2 M, 340/147 R, 340/146.1 E, 340/146.1 BE, 340/168 B, 178/2, 178/3, 178/4.1 R, 178/4.1 B
• US Class Current: 340/9.1
• CPC Class Codes: H04B 17/406 using coded addresses
• CPC Class Codes: H04Q 9/16 by predetermined number of pulses

Abstract

A system is described for randomly addressing any one of a plurality of remotely located stations connected by means of an electromagnetic wavepath. At the addressing point an addressing signal, comprising a series of m signal bursts, is generated and coupled onto the wavepath (11), where m is an integer and corresponds to the number of stations the addressed station is away from the addressing point. Each remote station includes means (33, 34, 41, 43) for deleting one signal burst and retransmitting the remaining signal bursts. Each station also includes means (34, 38, 42, 43, 44, 50, 51) for recognizing when only a single signal burst is received and for responding in a prescribed manner. By means of such a "count-down" technique, the m^th station from the addressing station is accessed. it is an advantage of such a system that the addressing circuit is the same at all the remote stations.

Claims

1. Apparatus for addressing one of a plurality of n remote stations distributed along a system capable of transmitting electromagnetic wave energy characterized in that said apparatus includes:

an addressing signal generator (22) coupled to said system (20, 21, i) for generating an addressing signal comprising a series of m signal bursts, where m is an integer between one and n, and designates the station to be addressed;

means (33, 34, 41,

     43) at each of said stations for deleting one burst from said series and for retransmitting a series of bursts having one less than the number received;

and further means (34, 38, 43, 44, 50,

     51) for recognizing that only a single addressing burst is received.

2. The apparatus according to claim 1 characterized in that said addressing signal comprises an amplitude modulated signal.

3. The apparatus according to claim 1 characterized in that said addressing signal comprises a phase modulated signal.

4. The apparatus according to claim 1 characterized in that said addressing signal comprises a frequency modulated signal.

5. The apparatus according to claim 1 characterized in that each station responds in a prescribed manner when only one addressing signal burst is received.

6. The apparatus according to claim 1 characterized in that said means for deleting a signal burst comprises:

a burst detector (34) coupled to said demodulating means;

means for coupling said demodulator means to one input port of an AND-gate (33);

and means (36, 39,

     43) for coupling the output from said detector (34) to a second input port of said gate (33) delayed a period of time equal to the burst repetition period of the addressing signal.

7. The apparatus according to claim 6 characterized in that said remote station includes:

a signal regenerator;

and in that the output from said gate (33) is coupled to a modulator (41) for modulating the regenerator output signal.

8. The apparatus according to claim 1 characterized in that the means for recognizing that only a single addressing burst is received comprises:

a burst detector (34) coupled to said demodulating means;

means (35), including a first inverter (50), for coupling the output from said detector to one input port (c) of an AND-gate (38);

means (36), including a delay circuit (43) having a delay τ

, for coupling the output from said detector to a second input port (d) of said gate (38);

and means (37), including a delay circuit (44) having a delay 2τ and

a second inverter (51), for coupling the output from said detector to a third input port (e) of gate (38), where τ

is equal to the repetition period of the addressing signal bursts.