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Orthogonal active-passive array pair matrix display

  • US 4,170,771 A
  • Filed: 03/28/1978
  • Issued: 10/09/1979
  • Est. Priority Date: 03/28/1978
  • Status: Expired due to Term
First Claim
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1. An orthogonal active-passive array pair display comprising:

  • a transparent dielectric optical coupling means;

    a one-dimensional active display having parallel light emitting lines on an input side of said transparent dielectric optical coupling means with the output emissions of each of said parallel light emitting lines being separately controllable by enabling voltages applied thereto;

    a one-dimensional passive display having parallel light controlling lines on an output side of said transparent dielectric optical coupling means that are orthogonal to said parallel light emitting lines with the transmission of each of said parallel light controlling lines being separately controllable by enabling voltages applied thereto in which the output emissions of said active display are seen by said passive display through said transparent dielectric optical coupling means; and

    a control electronic means for accepting video-type input signals and for modifying said video-type input signals therein for separately controlling the enabling voltages applied to said active display and to said passive display by providing a preferred scan mode of the enabling voltages applied to individual lines of said parallel light emitting lines and said parallel light controlling lines in which each video line is applied to one individual line of said parallel light emitting lines of said active display and to all of said parallel light controlling lines of said passive display through first and second serial-to-parallel converter arrays that simultaneously control all of said passive display lines by performing serial-to-parallel conversions on selected individual line scan video signals into a plurality of parallel converter elements that are serial-to-parallel stored in one of said first or second serial-to-parallel arrays while the other of said first or second serial-to-parallel converter arrays simultaneously parallel dump other selected individual line scan video signals upon which serial-to-parallel conversions had been performed on a previous video scan line wherein parallel dumping is into the gates of a plurality of parallel transistors of a compatible transistor array that gate enabling voltages to said passive display parallel light controlling lines and alternately repeating the serial-to-parallel conversions and parallel dumping between said first and second serial-to-parallel converter arrays of selected individual line scan video signals in order to display information contained in said video-type input signals.

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