Circuit and method for controlling reactive load currents of a three-phase system

• US 4,174,497 A
• Filed: 10/03/1977
• Issued: 11/13/1979
• Est. Priority Date: 10/02/1976
• Status: Expired due to Term

• Current Assignee: Brown Boveri & CIE AG (ABB Limited)
• Original Assignee: Brown Boveri & CIE AG (ABB Limited)
• Inventors: Depenbrock, Manfred
• Primary Examiner(s): Pellinen, A. D.
• Application Number:
  US05/839,038
• Time in Patent Office: 771 Days
• Field of Search: 323/101, 323/119, 323/128
• US Class Current: 323/211
• CPC Class Codes: H02J 3/1842 wherein at least one reactive element is actively controlled by a bridge converter, e.g. active filters
• CPC Class Codes: H02M 7/00 Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
• CPC Class Codes: Y02E 40/20 Active power filtering [APF]

Abstract

Circuit for controlling reactive currents of a three-phase network, having three converters with forced commutation connected in parallel with the loads of the three-phase network, at least one energy accumulator connected to the d-c side of the converter, and a closed control loop having measuring transformers for input currents of the converter, for the load currents and for the conductor voltages of the network, means for evaluating required compensation currents and means for controlling firing pulse formers for the converters to adjust the waveform of the currents on the three-phase side, including capacitors shunted across the loads in three phases, the compensation control element being a three-phase four-quadrant control element, the energy accumulator being an additional capacitor and a resonant circuit tuned to twice the network frequency, the resonant circuit being connected in parallel to the additional capacitor, the control loop including means for controlling the mean voltage on the d-c side of the four-quadrant control device, a conductance measuring converter connected to the measuring transformers for the load currents and an active-current reference-value generator connected to the conductance measuring converter.

Claims

1. Circuit assembly for compensating and balancing rapidly variable reactive currents of loads connected to a three-phase network, the circuit assembly having compensation control element in the form of three converters with forced commutation connected in parallel with the loads of the three-phase network, at least one energy accumulator connected to the d-c side of the converter, and a closed control loop having measuring transformers for the actual values of the currents (i_R, i_S, i_T) of the compensation control elements, measuring transformers for the actual values of the load currents (i_RO, i_SO, i_TO) and measuring transformers for determining the actual values of the voltages (u_RS, u_ST, u_TR) between the conductors of the three-phase network, and evaluator means for calculating reference values for the active currents (i_WR, i_WS, i_WT) from the actual values of the voltages (u_RS, u_ST, u_TR) and the load currents (i_RO, i_SO, i_TO), said evaluator means including three summers of first current components (i_VR, i_VS, i.sub. VT) determined instantaneously and means for determining the reference values for the control element currents (i_R, i_S, i_T) from the difference of said current components (i_VR, i_VS, i_VT), and for determining reference values for active currents (i_WR, i_WS, i_WT) from the difference of the reference values and the actual values of the control element currents (i_R, i_S, i_T) which control deviations (x_R, x_S, x_T) for controlling firing pulse formers for the compensation control elements to adjust the waveform of the currents on the three-phase side, comprising

(a) said evaluator means being in the form of a conductance measuring converter having an output connected to a fourth summer and an active-current reference value generator connected to said fourth summer for determining, continuously in time, the reference values for the active currents (i_WR, i_WS, i_WT), said conductance measuring transformer being acted upon on the input side thereof by the first current components (i_VR, i_VS, i_VT) and the linked load voltages (u_RS, u_ST, u_TR), the active-current reference value generator being additionally acted upon by the linked load voltages (u_RS, u_ST, u_TR) and by the output signal of the conductance measuring transformer,

(b) capacitors shunted across the loads in all three phases,

(c) said energy accumulator being in the form of an additional capacitor and a resonant circuit, said resonant circuit being tuned to twice the network frequency,

(d) said control loop comprising means for regulating the mean voltage (U_c) on the d-c side of the compensation control element as well as said evaluator means for controlling the wave-shape of the currents on the three-phase side,

(e) said regulating means having an output connected to said fourth summer.

2. Circuit arrangement according to claim 1, wherein the three capacitor phases of said three-phase capacitors have current capacities that are each substantially one-half the magnitude of the largest load current to be compensated in the respective phase.

3. Circuit arrangement according to claim 2, wherein the capacities of said three-phase capacitors are unequal and said three-phase capacitors are delta-connected.

4. Circuit arrangement according to claim 1 wherein said fourth summer comprises means for adding with respect to sign, quantities which are proportional to the resultant conductance of the load and the three-phase capacitor to the reference value of the conductance for the compensation control elements, said active-current reference value generator being in the form of three multipliers having two sets of inputs, to one set of inputs thereof is fed the quantity proportional to the sum of the resultant conductance and to the other set of inputs are fed quantities which correspond to the waveform of the voltages (u_RS, u_ST, u_TR) to which the active-current reference values (i_WR, i_WS, i_WT) to be generated are to be proportional.

5. Circuit arrangement according to claim 1 wherein the compensation control element is in the form of a delta connection of said three four-quadrant control elements.

6. Measured-value converter for a circuit arrangement for compensating and balancing rapidly variable reactive currents of loads connected to three-phase system for determining a component of, or a component proportional to a periodically oscillating electrical reference quantity, and a component from the group of a voltage and a cuurent (i) in accordance with the equation:

##EQU19## where i_w =active component of the current,

T=period of the reference quantity, of the voltages

U=r.m.s. value of the voltage,

t=time,

and having at least one multiplier on the input side for forming the product of the current and the reference quantity, a dead time member with a signal propogation time equal to the period (T), and at least one integrator, comprising said integrator having controlled resettability, the input of said integrator being connected to the output of said multiplier, so as to sum the output variables, said integrator being resettable after each period (T) to a defined value, a sample-and-hold member operating with the same period (T), the inputs of said dead time member and said sample-and-hold member being jointly connected to the output of said integrator, said sample-and-hold member storing the output variable of said integrator before said integrator is reset, and including at least one summer and another multiplier having first and second inputs, the outputs of said sample-and-hold member, said integrator and the inverted output of said dead time member, are jointly connected to the inputs of said summer, the output of said summer being connected to a first input of said other multiplier the periodic reference quantity being connected to the second input of said multiplier.

7. Measured-value converter according to claim 6, wherein said dead time member is in the form of a series-analog time delay circuit controllable by clock pulses, and including a frequency multiplier, the output of which is connected to the clock pulse input of said time delay circuit, the input of said frequency multiplier being connected to the resetting line of said integrator.

8. Measured-value converter according to claim 7, including a further summer and a further dead time member, the output of which is connected to said other multiplier to complement the signal jointly fed to said other multiplier by a first component in the signal path, the dead time (T_t) of said further dead time member having the value k·

T, k being a constant, the output variable of the further dead time member being amplified by a first factor (V₁) and subtracted in said further summer from the common signal, which is first amplified by a second factor (V₂) for complementation by a second component.

9. Measured-value converter according to claim 8, wherein the first factor (V₁) and the second factor (V₂) are equal to twice the reciprocal constant (1/2k).

10. Measured-value converter according to claim 9, wherein the constant (k) has a value of substantially 0.5.

11. Measured value converter according to claim 6 having digital switching members wherein said sample-and-hold member and dead time member are digital, said summer is analog and has an output and two inputs and including an inverting analog summer having an output, an m-bit analog-to-digital converter connected to the output of said integrator ahead of said dead time member and said sample-and-hold member in the signal path, two m-bit full summers connected to the outputs of said digital sample-and-hold member and said digital dead-time member, first and second digital-to-analog converters having outputs and being connected between said full summers and said analog summers, said first digital-to-analog converter being connected to an output of said full summers, a further dead-time member having an input and an output, the input of said further dead-time member being connected to an output of said full summers and the output of said further dead-time member being connected to said second digital-to-analog converter, the output of said inverting analog summers which has the input connected to the output of said second digital-to-analog converter, being further connected to one input of said analog summer and the other input of said analog summer being connected to the output of said first digital-to-analog converter, the output of said analog summer being connected to said other multiplier.

12. Measured-value converter according to claim 11, including an additional summer, the inputs of which are connected to the outputs of said further multipliers, the output of said additional summer forming the third proportional current component belonging to a three-phase voltage system from the two first current components which correspond to the multiplier outputs.