Analog noise generator
First Claim
1. A binary random noise generator for the stochastic coding of digital or analog information, comprising:
- means for generating a binary signal with random transitions;
means for sampling said binary signal;
a clock generating a clock signal;
means for synchronizing said sampling means by said clock signal;
a divider dividing said clock signal by two;
an exclusive OR gate having two inputs, one of said inputs receiving the signal from said by-two divider and the other of said inputs receiving the signal from said sampling means, whereby the output of said exclusive OR gate has a strict equiprobability of its two logic states.
0 Assignments
0 Petitions
Accused Products
Abstract
The present invention relates to a binary random noise generator for the stochastic coding of digital or analog information, comprising a comparator having two inputs, one of which receives a reference voltage and the other a random analog noise coming from a source of noise, said comparator supplying at its output a binary signal with random transitions, said generator comprising a clock and a logic system which, on the one hand, effect the sampling of the binary signal with random transitions in synchonism with the frequency of said clock and, on the other hand, ensure the strict equiprobality of the two logic states of said binary signal with random transitions, without increasing the radius of correlation. The invention is more particularly applied to the stochastic coding of information with a view to calculation or transmission, with equidistribution of binary variable.
49 Citations
4 Claims
-
1. A binary random noise generator for the stochastic coding of digital or analog information, comprising:
-
means for generating a binary signal with random transitions; means for sampling said binary signal; a clock generating a clock signal; means for synchronizing said sampling means by said clock signal; a divider dividing said clock signal by two; an exclusive OR gate having two inputs, one of said inputs receiving the signal from said by-two divider and the other of said inputs receiving the signal from said sampling means, whereby the output of said exclusive OR gate has a strict equiprobability of its two logic states. - View Dependent Claims (2, 3, 4)
-
Specification