Method of making semiconductor diodes

• US 4,180,422 A
• Filed: 12/06/1973
• Issued: 12/25/1979
• Est. Priority Date: 02/03/1969
• Status: Expired due to Term

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Rosvold, Warren C.
• Primary Examiner(s): Rutledge, L. Dewayne
• Assistant Examiner(s): Saba, W. G.
• Application Number:
  US05/422,396
• Time in Patent Office: 2,210 Days
• Field of Search: 148/175, 148/187, 29/580, 29/578, 156/17, 156/647, 156/648, 156/649, 156/653, 156/662, 156/657, 357/55, 357/15, 357/49, 357/65, 357/68, 357/69
• US Class Current: 438/478
• CPC Class Codes: H01L 21/30608 Anisotropic liquid etching H01L21/3063 takes precedence
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/6609 Diodes
• CPC Class Codes: H01L 29/66113 Avalanche diodes
• CPC Class Codes: H01L 29/868 PIN diodes
• CPC Class Codes: Y10S 438/978 forming tapered edges on substrate or adjacent layers

Abstract

A method of making a number of semiconductor diodes on a single wafer without breakage during handling and processing, comprising the steps of forming a plurality of mesas on one surface of an intrinsic substrate, diffusing a selected first conductivity-type region into each mesa, coating the front surface of the substrate and mesas with oxide, chemically milling recesses into the opposite side of the substrate in alignment with the mesas to a predetermined depth where the mesas are each supported by a thin annular area of substrate material permitting transfer of the device into an epitaxial reactor, gas etching the recesses to a depth beyond the oxide interface to physically separate the mesas from the substrate material, growing a thin epitaxial layer of opposite conductivity type over the back surface of the device, applying ohmic contacts to the device, and separating the individual mesas.

Claims

1. The method of forming a semiconductor structure comprising the steps of:

(a) etching into a surface of a layer of silicon material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material with sides parallel to a <

111>

crystallographic plane of such material;

(b) forming a layer of insulating material over the walls; and

,

(c) forming a layer of conductive material over the layer of insulating material.

2. The method recited in claim 1 including the step of forming a semiconductor body having the layer of silicon material and a second layer of silicon material having a different conductivity type from the conductivity type of the first mentioned layer of silicon material.

3. The method recited in claim 1 including the step of forming first and second semiconductor layers on opposite surfaces of the silicon layer, such second semiconductor layer being formed with a surface parallel to a <

111>

crystallographic plane of the silicon layer.

4. The method recited in claim 3 wherein the second semiconductor layer is formed by epitaxial growth.

5. The method recited in claim 4 wherein the first semiconductor layer is formed by diffusion into the silicon layer.

6. The method of forming a semiconductor device comprising the steps of:

(a) etching into a surface of a layer of silicon material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material with sides parallel to a <

111 22 crystallographic plane of such material, such walls being formed about at least a portion of the periphery of the device;

(b) forming a layer of insulating material over the walls; and

(c) forming a layer of conductive material over the layer of insulating material.

7. The method of forming a semiconductor structure comprising the steps of:

(a) etching into a surface of a layer of semiconductor material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material having sides parallel to a <

111 >

crystallographic plane of such material; and

(b) forming a conductive layer having a first portion lying in the <

100>

crystallographic plane of the semiconductor material and having a second portion lying in the <

111>

crystallographic plane of the semiconductor material.

8. The method of forming a semiconductor structure comprising the steps of:

(a) etching into a surface of a layer of semiconductor material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material with sides parallel to planes disposed at acute angles in the order of 30 degrees with respect to an axis perpendicular to the surface of the material;

(b) forming a conductive layer having a first portion lying in the <

100>

crystallographic plane of the material and having a second portion lying in a plane parallel to the plane of one of the sides.

9. The method recited in claim 8 including the step of forming a layer of insulating material over the sides of the semiconductor material.

10. The method of forming a semiconductor device comprising the step of etching into a surface of a layer of semiconductor material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material with sides parallel to a <

111>

crystallographic plane of such material, such walls being formed about at least a portion of the periphery of the device.

11. The method of forming a semiconductor device comprising the step of etching into a surface of a semiconductor material, such surface lying in a <

100>

crystallographic plane of such material to form walls in such material having sides parallel to planes disposed at angles in the order of 30 degrees with respect to an axis perpendicular to the surface of the material, such walls being formed about at least a portion of the periphery of the device.

12. The method of forming a semiconductor device comprising the steps of:

(a) etching into a surface of a layer of silicon material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material having sides parallel to a <

111>

crystallographic plane of such material; and

(b) forming a conductive layer having a first portion lying in the <

100>

crystallographic plane of the silicon material and having a second portion lying in the <

111>

crystallographic plane of the silicon material.

13. The method of forming a precisely chemically etched semiconductor structure comprising the steps of:

(a) chemically etching into a surface of a layer of silicon material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material with sides parallel to planes disposed at acute angles in the order of 30 degrees with respect to an axis perpendicular to the surface of the material; and

(b) forming a conductive layer having a first portion lying in the <

100>

crystallographic plane of the material and having a second portion lying in a plane parallel to the plane of one of the sides.

14. The method of forming a semiconductor device comprising the step of etching into a surface of a layer of silicon material, such surface lying in a <

100>

crystallographic plane of such material, to form walls in such material with sides parallel to a <

111>

crystallographic plane of such material, such walls being formed about at least a portion of the periphery of the device.

15. The method of forming a semiconductor device comprising the steps of etching into a surface of silicon material, such surface lying in a <

100>

crystallographic plane of such material to form walls in such material having sides parallel to planes disposed at angles in the order of 30 degrees with respect to an axis perpendicular to the surface of the material, such walls being formed about at least a portion of the periphery of the device.