×

Liquid crystal display device using signal converter of digital type

  • US 4,180,813 A
  • Filed: 07/26/1977
  • Issued: 12/25/1979
  • Est. Priority Date: 07/26/1977
  • Status: Expired due to Term
First Claim
Patent Images

1. A liquid crystal display device for displaying a video signal, comprising:

  • (a) a liquid crystal display panel in which liquid crystal picture elements are located at intersections of plural rows of scanning electrodes and plural columns of signal electrodes arranged in a matrix configuration, the transmissivity of said liquid crystal picture elements being selectively controlled when the associated scanning and signal electrodes are energized;

    (b) a control circuit for generating a first, a second, and a third clock signal;

    (c) ring counter means for producing a scanning signal in response to said first clock signal;

    (d) means for energizing selected ones of said scanning electrodes in response to said scanning signal;

    (e) a signal electrode drive circuit including a plurality of drivers, each of said drivers being connected to one of said electrodes for energizing the same; and

    (f) a signal converting circuit including;

    an analog-to-digital converter for converting a video signal to be displayed for one horizontal period into a plurality of time-serial binary-coded signals each corresponding to an amplitude of a corresponding part of said video signal;

    means for converting said plurality of time-serial binary-coded signals into a plurality of time-serial pulse trains in accordance with said second clock signal, each train including a number of pulses determined by the corresponding binary-coded signal;

    a plurality of first shift registers connected in series for storing said plurality of time-serial pulse trains; and

    a plurality of second shift registers, each first shift register being connected to one of said second shift registers, for storing the contents of said first shift registers at a time in response to said first clock signal and, each of said second shift registers being connected to one of said drivers correspondingly and respectively, for supplying said time-serial pulse trains to the same in accordance with said third clock signal.

View all claims
  • 0 Assignments
Timeline View
Assignment View
    ×
    ×