Booster circuit

• US 4,186,436 A
• Filed: 01/23/1978
• Issued: 01/29/1980
• Est. Priority Date: 01/27/1977
• Status: Expired due to Term

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Ishiwatari, Masumi
• Primary Examiner(s): Shoop, William M.
• Application Number:
  US05/871,746
• Time in Patent Office: 736 Days
• Field of Search: 307/109, 307/110, 320/1, 363/59, 363/60
• US Class Current: 363/60
• CPC Class Codes: G09G 3/18 using liquid crystals
• CPC Class Codes: H02M 1/009 having two or more independently controlled outputs for DC-DC converter with intermediate AC H02M3/33561
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps

Abstract

A voltage step-up circuit, or booster circuit, wherein in response to a first signal a first switching element is enabled to charge a first capacitor with an input voltage while a second switching element is disabled, and in response to a second signal the second switching element is enabled to charge with the input voltage a second capacitor connected in series to the first capacitor while the first switching element is disabled. The sum of the voltages appearing across the first and second capacitors is derived as an output voltage. The "ON" and "OFF" times of the first and second signals may be varied, and the ratio between the "ON" time of the first signal to the "ON" time of the second signal may also be varied. The number of switching elements and capacitors may be increased as needed.

Claims

1. Semiconductor unit for producing higher potential than input voltage by the use of electric energy storage means comprising:

first and second input terminals for supplying electric energy to said unit;

a first switching circuit for transmitting the electric energy applied to said first and second input terminals, said first switching circuit comprising a first electric switching element (Q1) and a second electric switching element (Q3);

a second switching circuit for transmitting the electric energy applied to said first and second input terminals, said second switching circuit comprising a third electric switching element (Q2) and a fourth electric switching element (Q4);

a first output terminal electrically connected through the first switching element of said first switching circuit to said first input terminal;

a second output terminal electrically connected through the second switching element of said first switching circuit to said second input terminal, and connected through the third switching element of said second switching circuit to said first input terminal;

a third output terminal electrically connected through the fourth switching element of said second switching circuit to said input terminal;

(a) first energy storage means coupled between said first output terminal and said second output terminal;

(b) second energy storage means coupled between said second output terminal and said third output terminal; and

a signal generating circuit for generating a first pulse signal train to be applied to said first switching circuit and a second pulse signal train to be applied to said second switching circuit, the pulses of the first and second pulse signal trains being different in phase from each other, and thus said first and second switching circuits being alternatively driven;

whereby electric energy is stored in said first and second energy storage means.

2. Semiconductor unit according to claim 1 wherein the pulses of the first and second pulse signal trains of said signal generating circuit are different in pulse width from each other.

3. Semiconductor unit according to claim 1 wherein said first and second switching circuits comprise MOS transistors.

4. Semicondutor unit according to claim 1, wherein said first and second energy storage means are capacitors.

5. Monolithic semiconductor unit according to claim 4 wherein the pulses of the first and second pulse signal trains of said signal generating circuit are different in the pulse width from each other.

6. Monolithic semiconductor unit according to claim 4 wherein said first and second switching circuits comprise MOS transistors.