Information handling apparatus having multiple ports distributed around shifting register rings

• US 4,193,121 A
• Filed: 07/12/1977
• Issued: 03/11/1980
• Est. Priority Date: 07/16/1976
• Status: Expired due to Term

• Current Assignee: British Telecommunications (BT Group Plc) (BT Group PLC)
• Original Assignee: Post Office Limited (International Distributions Services plc)
• Inventors: Sargent, Desmond J., Fedida, Samuel
• Primary Examiner(s): Thomas, James D.
• Application Number:
  US05/814,921
• Time in Patent Office: 973 Days
• Field of Search: 365/78, 364/900 MS File, 364/200
• US Class Current: 711/110
• CPC Class Codes: G06F 3/007 Digital input from or digital output to memories of the shift register type
• CPC Class Codes: G06F 3/153 using cathode-ray tubes

Abstract

An information handling apparatus capable of having a large number of input/output ports includes a plurality of independent processors connected to respective positions around a plurality of closed rings of shifting registers arranged in parallel which form the main storage medium for the apparatus.

Claims

1. An information handling apparatus including a plurality of ports, each for receiving input signals and transmitting corresponding output signals, a plurality of port control units, each of which is connected to at least one of said ports, and information storage means connected to all of the port control units, the information storage means including several pluralities of closed rings formed of groups of shifting register stages connected in series, each ring having the same number of stages and having a plurality of junctions at which the last stage of one group of shifting register stages is connected directly to the first stage of the next group of shifting register stages around the particular ring, the port control units being connected directly to respective corresponding junctions in each plurality of rings, and stepping means for synchronously and continuously recirculating information around the rings, the information consisting of groups of digits, the digits of each group being respectively stored in the rings of a plurality of rings and propagated in parallel by the stepping means so as to appear in parallel at corresponding junctions of the particular plurality of rings, and each port control unit being connected to the stepping means and to all of the rings and including means enabling it to read a selected group of digits in parallel by accessing the corresponding junctions on the rings at an instant associated with the selected group of digits, and by selecting one of the pluralities from among the several pluralities.

2. Apparatus according to claim 1 wherein in each of the rings of shifting register stages, the groups of stages between the junctions to which the port control units are connected include the same number of stages and each group of stages is constructed as an integrated circuit.

3. Apparatus according to claim 1, wherein the port control units are substantially uniformly spaced around the rings.

4. Apparatus according to claim 1, wherein each port control unit includes data processing means arranged to respond to input signals to select items of information specified in the input signals from the information storage means and transmit them as output signals.

5. Apparatus according to claim 4 wherein the data processing means includes a microprocessor.

6. Apparatus according to claim 5 wherein the data processing means is arranged to perform calculations in response to the input signals.

7. Apparatus according to claim 1 wherein each port control unit is connected to buffer means for a plurality of ports.