Microprocessor tone synthesizer with reduced quantization error
First Claim
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1. An encoder for use in communications apparatus and comprising in combination:
- a stable signal source for supplying high frequency clock signals at a predetermined frequency;
a code source for supplying data signals representative of a predetermined set of tone codes;
synthesizer means coupled to the output of said stable signal source for receiving said clock signals, and coupled to the code source for receiving said tone code data signals and for providing first square wave signals at frequencies which are one-half of the frequencies called for by said tone codes;
multiplier means coupled to an output of the synthesizer means and comprising integrator means for integrating the first square wave signals, zero crossing detector means coupled to the output of the integrator means, logic gating means coupled to receive the output signals of the detector means and the first square waves for providing second square wave signals at the frequencies called for by said tone codes.
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Abstract
The accuracy of a required tone set, digitally synthesized by a microprocessor, is improved beyond the theoretical limit of the microprocessor circuitry by producing each tone at a frequency which is a sub-multiple of the desired frequency, then multiplying to provide the desired frequency. With the addition of a multiplier such as a doubler, a better choice of oscillator frequency becomes possible which further increases the tone frequency accuracy. The microprocessor can also reduce the start up time and the time between tones, eliminating delays in transmitting a series of coded tones.
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4 Claims
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1. An encoder for use in communications apparatus and comprising in combination:
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a stable signal source for supplying high frequency clock signals at a predetermined frequency; a code source for supplying data signals representative of a predetermined set of tone codes; synthesizer means coupled to the output of said stable signal source for receiving said clock signals, and coupled to the code source for receiving said tone code data signals and for providing first square wave signals at frequencies which are one-half of the frequencies called for by said tone codes; multiplier means coupled to an output of the synthesizer means and comprising integrator means for integrating the first square wave signals, zero crossing detector means coupled to the output of the integrator means, logic gating means coupled to receive the output signals of the detector means and the first square waves for providing second square wave signals at the frequencies called for by said tone codes. - View Dependent Claims (2, 3, 4)
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Specification