Resistive planar graphical entry device
First Claim
Patent Images
1. A graphical entry device comprising an electrically insulated substrate;
- and a patterned resistive layer on the substrate wherein the patterned resistive layer includesa rectangular graphic area with four edges and four corners,four pairs of conductor strips spaced from and extending along the respective four edges of the graphic area, each conductor strip of the four pairs of conductor strips extending along a respective one half of a respective edge of the four edges from a respective corner of the four corners to a middle portion of the respective edge,four edge connecting means joining the respective pairs of conductor strips to the respective edges, said four edge connecting means each having an effective resistance parallel to the respective edges of the rectangular graphic area substantially greater than that of the graphic area and the four pairs of conductor strips, andfour corner connecting means joining outer end portions of the four pairs of conductor strips adjacent to the respective four corners, each of said four corner connecting means having an effective resistance which is substantially greater than that of the graphic area and the four pairs of conductor strips and which is selected to improve the linearity of a voltage gradient in the rectangular graphic area.
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Abstract
In a resistive planar graphic device, conductor strips are divided into two segments and corner resistances interconnect outer ends of the conductor strips which extend in spaced relationship along the edges of a rectangular resistive area and which are connected by edge connecting and isolating resistances to the edges of the rectangular area. The corner resistances are selected to improve the linearity of voltage gradients in the rectangular area.
45 Citations
6 Claims
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1. A graphical entry device comprising an electrically insulated substrate;
- and a patterned resistive layer on the substrate wherein the patterned resistive layer includes
a rectangular graphic area with four edges and four corners, four pairs of conductor strips spaced from and extending along the respective four edges of the graphic area, each conductor strip of the four pairs of conductor strips extending along a respective one half of a respective edge of the four edges from a respective corner of the four corners to a middle portion of the respective edge, four edge connecting means joining the respective pairs of conductor strips to the respective edges, said four edge connecting means each having an effective resistance parallel to the respective edges of the rectangular graphic area substantially greater than that of the graphic area and the four pairs of conductor strips, and four corner connecting means joining outer end portions of the four pairs of conductor strips adjacent to the respective four corners, each of said four corner connecting means having an effective resistance which is substantially greater than that of the graphic area and the four pairs of conductor strips and which is selected to improve the linearity of a voltage gradient in the rectangular graphic area. - View Dependent Claims (2, 3, 4, 5, 6)
- and a patterned resistive layer on the substrate wherein the patterned resistive layer includes
Specification