Noise detector employing plural delay circuits

• US 4,220,926 A
• Filed: 08/23/1978
• Issued: 09/02/1980
• Est. Priority Date: 08/26/1977
• Status: Expired due to Term

• Current Assignee: Plessey Handel und Investments AG
• Original Assignee: Plessey Handel und Investments AG
• Inventors: Buckner, Ian W.
• Primary Examiner(s): Heyman, John S.
• Application Number:
  US05/935,942
• Time in Patent Office: 741 Days
• Field of Search: 328/111, 328/165, 307/234, 325/348, 325/474, 325/478
• US Class Current: 327/552
• CPC Class Codes: H03G 3/345 Muting during a short period of time when noise pulses are detected, i.e. blanking H03G3/348 takes precedence

Abstract

An impulse noise detector, for use in impulse noise suppressor circuits which are used for suppressing scratch noises in disc record players, comprises a rectifier operable on an applied signal to provide a rectified signal, a smoothing circuit for smoothing the rectified signal, a pair of delay and invert circuits operable on the smoothed signal for affording a corresponding plurality of time delayed signals, and a combiner for selectively combining the time delayed signals to afford an output which is indicative of the presence, in the applied signal, of impulse noise.

Claims

1. An impulse noise detector comprising rectifier means operable on an applied signal to provide a rectified signal, smoothing means for smoothing the rectified signal, a plurality of delay means for operating on the smoothed signal to afford a corresponding plurality of time delayed signals, and means for selectively combining the corresponding plurality of time delayed signals to afford an output which is indicative of the presence, in the applied signal, of impulse noise;

wherein each of the plurality of delay means operates in accordance with a function

space="preserve" listing-type="equation">e.sup.-s =e.sup.-ks /e.sup.-(k-1)s

where

0<

k<

1

e=the exponential function of approximately 2.718

s=the complex frequency variable.

2. An impulse noise detector according to claim 1, wherein each of the plurality of delay means comprises a delay and inverter circuit.

3. An impulse noise detector according to claim 1, wherein each of the plurality of delay means comprises a circuit having a pair of series connected operational amplifiers having a feedback resistance and a gain which is defined in dependence upon the value of said feedback resistance.

4. An impulse noise detector according to claim 1 wherein k is 0.6990.

5. An impulse noise detector according to claim 4, wherein said means for selectively combining the time delayed signals comprises a combiner and comparator arrangement.