Portable event analysis device

• US 4,220,992 A
• Filed: 11/03/1978
• Issued: 09/02/1980
• Est. Priority Date: 11/03/1978
• Status: Expired due to Term

• Current Assignee: Stephan F. Hooker, Thomas S. Blood
• Original Assignee: Stephan F. Hooker, Thomas S. Blood
• Inventors: Hooker, Stephan F., Blood, Thomas S.
• Primary Examiner(s): Krass, Errol A.
• Application Number:
  US05/957,152
• Time in Patent Office: 669 Days
• Field of Search: 364/403, 364/410, 364/900, 364/709, 364/728, 340/146.2, 273/176 A, 273/186 A, 273/179 A, 273/183 R, 235/92 GA, 235/92 SH, 235/92 CA, 35/29 A, 35/35 R
• US Class Current: 700/91
• CPC Class Codes: G06F 15/0283 for data storage and retrieval

Abstract

A portable battery-powered golf analyzing device includes a keyboard usable in an input mode to insert data describing each golf shot made by a player. The data is formed into a digital word and stored in memory. The memory is of a type which is not erased unless a specific signal is intentionally applied thereto. In an output mode, the keyboard is used to form a digital word describing desired data. The memory is then searched and each stored word is compared with the inserted word. Correspondence between the inserted and stored words is counted and the results displayed. A receptacle for the portable unit includes a power supply for recharging batteries in the portable unit and circuits for applying an erasing potential to the memory. Indicators instruct the operator through the sequence of steps in entering a description.

Claims

1. An apparatus for storing and retaining data describing a plurality of events and for selectively displaying cumulative descriptive information about those events comprising the combination of

a keyboard having a plurality of keys;

first logic means coupled to said keyboard for forming a digital word having a predetermined bit length in response to operation of at least one key;

an addressable memory;

a clock for producing a sequence of timing pulses;

a mode switch having an input position and an output position;

input logic means coupled to said memory for permitting successive parallel storage of each word formed by said first logic means when said mode switch is in said input position;

output logic means connected to said clock, said memory and said mode switch for responding to pulses from said clock only when said mode switch is in the output position to sequentially read out each word from said memory;

comparator means coupled to said first logic means and to said memory for comparing each word read out of said memory with a word formed in said first logic means and for producing an output signal when correspondence between the compared words exists; and

means for accumulating a count of said output signals and for displaying symbols representative of said count.

2. An apparatus according to claim 1 wherein said keyboard is functionally separated into two groups, each group including a plurality of keys, said keyboard having indicia associated with the keys in one of said key groups describing an identifying characteristic of the event to which each of said keys in said one group relates;

indicia associated with the keys in the other of said groups describing a quality describing characteristic of the event to which each of the keys in said other group relates;

and wherein said keyboard includes an enter key connected to said input logic means for actuating said input logic means.

3. An apparatus for storing and retaining data describing a plurality of golf shots made by a player and for selectively displaying cumulative descriptive information about those shots comprising the combination of

a keyboard having a plurality of keys functionally separated into at least two groups, each group including a plurality of keys;

indicia associated with the keys in a first one of said key groups describing the type of shot to which each of said keys in said first group relates;

indicia associated with the keys in a second one of said groups describing the quality of the shot to which each of the keys in said second group relates;

first logic means coupled to said keyboard for forming a digital word having a predetermined bit length in response to operation of at least one key in at least said one group;

an addressable memory;

a mode switch having an input position and an output position;

input logic means coupled to said memory for permitting successive parallel storage of each word formed by said first logic means when said mode switch is in said input position;

output logic means connected to said clock, said memory and said mode switch for responding to pulses from said clock only when said mode switch is in the output position to sequentially read out each word from said memory;

comparator means coupled to said first logic means and to said memory for comparing each word read out of said memory with a word formed in said first logic means when said mode switch is in the output position and for producing an output signal when correspondence between the compared words exists; and

means for accumulating a count of said output signals and for displaying symbols representative of said count.

4. An apparatus according to claim 3 wherein said keyboard includes

an "enter" key coupled to said input logic means for causing said logic means to transfer a word formed in said first logic means into said memory, and for placing said first logic means in a reset state.

5. An apparatus according to claim 4 wherein said first logic means inludes

a first logic circuit connected to said first group of keys for forming a portion of said digital word in response to operation of a key in said first group;

first circuit means for enabling said first logic circuit only in said reset state;

a second logic circuit connected to said second group of keys for forming a second portion of said digital word in response to operation of a key in said second group;

second circuit means for enabling said second logic means only after a word portion has been formed in said first logic circuit;

said apparatus further including a plurality of illuminatable indicators connected to said first logic means such that a first one of said indicators is illuminated when said first logic means is in the reset state, a second one of said indicators is illuminated when said second logic circuit is enabled, and a third one of said indicators is illuminated when a word has been formed in said second logic circuit, thereby indicating to an operator the next function to be performed.

6. An apparatus according to claim 4 wherein the keys in said second one of said groups is divided into

a first subgroup of keys having indicia indicating the quality of the shot other than direction.

7. An apparatus according to claim 6 wherein said first logic means includes

a logic circuit having at least three output terminals and at least three states for producing an output voltage sequentially at one of said output terminals in each state;

switch means operatively associated with each key for producing an electrical signal when its associated key is actuated and when the group to which said key belongs is supplied with voltage; and

circuit means interconnecting said switch means associated with each of said first group and said first and second subgroups to one of said output terminals,

said logic circuit being connected to supply voltage to the output terminal connected to said first group when said first logic means is in said reset state, to supply voltage to the output terminal connected to said first subgroup in response to operation of a key in said first group, and to supply voltage to the output terminal connected to said second subgroup in response to operation of a key in said first subgroup.

8. An apparatus according to claim 7 wherein said first logic means further includes

first, second and third latch means connected respectively to the switch means associated with said first group and said first and second subgroups for storing binary signals representative of the actuation of keys in said groups.

9. An apparatus according to claim 8 wherein said comparator means includes

a plurality of exclusive-OR gates;

and

circuit means for interconnecting first, second and third groups of gates in said plurality of said gates to said first, second and third latch means, respectively.