Multiplex system having digital coded power line signals

• US 4,222,035 A
• Filed: 05/25/1978
• Issued: 09/09/1980
• Est. Priority Date: 05/25/1978
• Status: Expired due to Term

• Current Assignee: Toro Company (Toro)
• Original Assignee: Warren G. Lohoff
• Inventors: Lohoff, Warren G.
• Primary Examiner(s): Yusko, Donald J.
• Application Number:
  US05/909,502
• Time in Patent Office: 838 Days
• Field of Search: 340/310 R, 340/310 A, 340/176, 340/167 R, 340/203, 340/210
• US Class Current: 340/12.32
• CPC Class Codes: H02J 13/00009 using pulsed signals
• CPC Class Codes: H02J 13/0001 using modification of a parameter of the network power signal
• CPC Class Codes: H04B 2203/5408 using protocols
• CPC Class Codes: H04B 3/542 the information being in digital form
• CPC Class Codes: H04L 27/24 Half-wave signalling systems
• CPC Class Codes: Y02B 90/20 Smart grids as enabling technology in buildings sector smart grids supporting the management or operation of end-user stationary applications in general, or like technologies with no associated climate change mitigation effect Y04S20/00
• CPC Class Codes: Y02E 60/00 Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
• CPC Class Codes: Y04S 10/52 Outage or fault management, e.g. fault detection or location
• CPC Class Codes: Y04S 40/121 using the power network as support for the transmission

Abstract

An electronic control circuit is disclosed herein for transmitting a coded signal and operating power to a selected one of a plurality of receivers via a single pair of wires. The control circuit includes a transmitter coupled to a source of AC line voltage and having a coding network for coding signals consisting of missing cycles from the AC line voltage so that a resultant output signal constitutes both the coded signal to the receiver and the operating power for the same receiver. Timing networks are included in the transmitter control circuit for allowing the output signals to be transmitted to the selected receiver only within a brief time interval. Reset networks are interconnected within the transmitter control circuit and the timing networks for returning the transmitter control circuit back to a condition of awaiting asynchronous commands for forwarding to a selected receiver via the single pair of wires.

Claims

1. A multiplex system comprising:

a transmitter;

controller operably coupled to said transmitter for activating said transmitter;

a plurality of receivers remotely located from said transmitter;

a single pair of wires interconnecting said transmitter to said receivers for conducting a coded power signal from said transmitter by said controller;

each of said receivers having a decoding means enabling said receiver to respond to said coded power signal;

said coded power signal is an AC line voltage signal for energizing said power circuits of said receivers and said coded power signal further includes interrupted cycles of the AC voltage constituting a code for generating said output signal from said selected one of said receivers in said plurality of receivers;

said transmitter includes a means for rendering selected ones of said receivers inoperable in accordance with said coded power signal; and

means coupled to said last mentioned means for permitting transmission of said coded power signal for a brief interval.

2. The invention as defined in claim 1 including at least four control loops in said transmitter wherein each loop comprises:

a data buffer control loop coupled to said controller for accepting asynchronous commands for transmission to a selected one of said receivers;

a search control loop coupled to said data buffer control loop for scanning said commands;

an operational control loop coupled to data buffer and said search control loops for operating said AC power line to said receivers; and

a command transmission sequence for placing the code in said AC power signal and inroducing said coded power signal to said receivers.

3. The invention as defined in claim 1 wherein:

each of said receivers includes a transformer having its input coupled to receive said coded power signal;

a rectifier and filter network and a missing cycle detector coupled to the output of said transformer;

a counter driver and said detector coupled to selectively receive operating power from said rectifier and filter network; and

said counter being responsive to a pulse output from said detector to produce an output signal depending upon the number of pulses received from said detector.

4. The invention as defined in claim 3 wherein:

said rectifier and filter network includes a capacitor for storing energy during the time voltage is impressed across it and for releasing the energy during times when no voltage is present so as to constitute a constant supply voltage to said detector and said counter driver.