Heart beat cumulator
First Claim
1. In apparatus of the type having(1) means for obtaining an electrocardio input signal,(2) means for amplifying the electrocardio input signal,(3) a bandpass filter for filtering the amplified electrocardio signal,(4) means coupled to the output of the bandpass filter for deriving a reference signal related to the peak amplitude of the filtered electrocardio signals,(5) a comparator arranged to compare the filtered electrocardio signal with the reference signal, the comparator emitting a heart beat count signal when the amplitude of the filtered electrocardio signal exceeds the reference signal,(6) means for preventing actuation of the comparator for a period of time after emission of a heart beat count signal whereby activation of the counter by spurious signals is prevented, and(7) a heart beat signal counter coupled to the output of the comparator, the heart beat signal counter being arranged to count heart beat signals emitted by the comparator,the improvement of apparatus for separately recording for each interval the number of heart beats occurring in each of a succession of intervals, the improvement comprising(a) a memory device having a plurality of recording addresses, the heart beat signal counter being coupled to the memory device for transmission of its count thereto,(b) a clock arranged to periodically emit clock signals, and(c) an address counter for controlling the address at which information from the heart beat signal counter is recorded in the memory device, the address counter responding to clock signals by causing information from the heart beat signal counter to be recorded at a new address at periodic intervals.
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Accused Products
Abstract
A heart beat cumulator records the number of heart beats occurring in each of a succession of ten minute intervals. An electrical signal of heart activity obtained from electrodes on the subject is amplified and applied to the input of a filter having a pass band of about 15Hz to 25Hz. The output of the filter is fed to a peak follower that provides a reference signal to a comparator which is actuated when the amplitude of the output of the filter exceeds the amplitude of the reference signal. Upon actuation of the comparator, the comparator emits a heart beat signal and triggers a monostable multivibrator that blocks the input to the comparator for about one third of a second. The heart beat signal is fed to a data counter. After each ten minute interval, measured by an internal electronic clock, the count in the data counter is written into a memory and the memory is then advanced by an address counter to a new address to condition the memory to record the count for the next ten minute interval at the new address.
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Citations
3 Claims
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1. In apparatus of the type having
(1) means for obtaining an electrocardio input signal, (2) means for amplifying the electrocardio input signal, (3) a bandpass filter for filtering the amplified electrocardio signal, (4) means coupled to the output of the bandpass filter for deriving a reference signal related to the peak amplitude of the filtered electrocardio signals, (5) a comparator arranged to compare the filtered electrocardio signal with the reference signal, the comparator emitting a heart beat count signal when the amplitude of the filtered electrocardio signal exceeds the reference signal, (6) means for preventing actuation of the comparator for a period of time after emission of a heart beat count signal whereby activation of the counter by spurious signals is prevented, and (7) a heart beat signal counter coupled to the output of the comparator, the heart beat signal counter being arranged to count heart beat signals emitted by the comparator, the improvement of apparatus for separately recording for each interval the number of heart beats occurring in each of a succession of intervals, the improvement comprising (a) a memory device having a plurality of recording addresses, the heart beat signal counter being coupled to the memory device for transmission of its count thereto, (b) a clock arranged to periodically emit clock signals, and (c) an address counter for controlling the address at which information from the heart beat signal counter is recorded in the memory device, the address counter responding to clock signals by causing information from the heart beat signal counter to be recorded at a new address at periodic intervals.
Specification