Process for producing an electrostatically deformable thin silicon membranes utilizing a two-stage diffusion step to form an etchant resistant layer
First Claim
1. A process for producing mechanically stable thin membranes in a crystalline silicon substrate suitable for incorporation in integrated circuits, comprising the steps of:
- (a) diffusing boron into one of the opposite sides of a silicon substrate in a deposition furnace for a period of time not greater than approximately 90 minutes, with the boron being supplied in an amount sufficient and at a temperature sufficient to form a layer in the silicon substrate having boron atom concentrations greater than 1021 per cubic centimeter;
(b) transferring the diffused silicon substrate from the deposition furnace to a drive furnace while substantially excluding absorption of water vapor by the silicon substrate;
(c) heating the substrate in the drive furnace in an ambient gas which is substantially oxygen and water vapor free for a selected period of time at a temperature sufficient to drive the diffused boron to a desired depth in the silicon substrate;
(d) masking the side of the substrate opposite to the boron diffused layer to expose a selected area of silicon at a portion of the surface having selected lateral dimensions; and
(e) applying a silicon etchant to the exposed unmasked surface area until sufficient silicon is dissolved to expose the diffused boron layer and be retarded from further etching thereby, the exposed portion of the etchant resistant layer thereby forming a thin membrane.
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Abstract
The invention relates to thin silicon membranes formed in layers of silicon such as are normally utilized as substrates in the manufacture of integrated electronic circuits. The thin membranes constructed in accordance with the invention are capable of deformation by electrostatic forces and are applicable to a wide range of uses including the manufacture of solid state pressure sensors, resonant, and antenna structures, as well as electro-optical display elements. A processing technique is disclosed which is particularly adapted to forming membranes in silicon substrates in a manner which is compatible with the construction thereon of other integrated circuit components. The process involves a short and concentrated deposition diffusion of boron into one of the surfaces of the substrate, followed by rapid and substantially oxygen and water vapor free transfer of the substrate to a drive furnace which is oxygen and water vapor free in which diffusion to a preselected depth takes place over a controlled period of time.
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Citations
10 Claims
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1. A process for producing mechanically stable thin membranes in a crystalline silicon substrate suitable for incorporation in integrated circuits, comprising the steps of:
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(a) diffusing boron into one of the opposite sides of a silicon substrate in a deposition furnace for a period of time not greater than approximately 90 minutes, with the boron being supplied in an amount sufficient and at a temperature sufficient to form a layer in the silicon substrate having boron atom concentrations greater than 1021 per cubic centimeter; (b) transferring the diffused silicon substrate from the deposition furnace to a drive furnace while substantially excluding absorption of water vapor by the silicon substrate; (c) heating the substrate in the drive furnace in an ambient gas which is substantially oxygen and water vapor free for a selected period of time at a temperature sufficient to drive the diffused boron to a desired depth in the silicon substrate; (d) masking the side of the substrate opposite to the boron diffused layer to expose a selected area of silicon at a portion of the surface having selected lateral dimensions; and (e) applying a silicon etchant to the exposed unmasked surface area until sufficient silicon is dissolved to expose the diffused boron layer and be retarded from further etching thereby, the exposed portion of the etchant resistant layer thereby forming a thin membrane. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification