Signal generator and signal converter using same

• US 4,236,090 A
• Filed: 08/08/1978
• Issued: 11/25/1980
• Est. Priority Date: 08/08/1978
• Status: Expired due to Term

• Current Assignee: Alcatel SA (Nokia Corporation)
• Original Assignee: International Standard Electric Corporation (ITT, Inc.)
• Inventors: Cornu, Jozef, Taeymans, Jean R. J. M., Talbot, Jacques
• Primary Examiner(s): Heyman, John S.
• Application Number:
  US05/931,650
• Time in Patent Office: 840 Days
• Field of Search: 328/142, 328/143, 307/221 D, 307/260, 307/268, 307/227
• US Class Current: 327/100
• CPC Class Codes: H03K 4/02 having stepped portions, e.g. staircase waveform

Abstract

The signal generator comprises a charge transfer device providing an output signal having any desired shape so that it is particularly useful in an A/D or D/A converter. In this device charges are transferred under electrodes of which some are split in order to obtain charge portions which are then removed or transferred to the output of the device where they are added to or subtracted from previous charge portions to finally obtain a desired output signal.

Claims

1. A signal generator to generate at its output a first variable output signal comprising:

at least one first charge transfer device having a plurality of stages;

clocking means coupled to given ones of said plurality of stages to clock a first input signal into said first transfer device and to step the contents thereof through said first transfer device; and

an output circuit coupled to at least one of said plurality of stages to collect portions of said first input signal present in said one of said plurality of stages as a function of said first variable output signal to be generated and to further process said signal portions, said output circuit including

first gating means formed as a part of said first transfer device coupled to said one of said plurality of stages to selectively collect and to gate said signal portions to said generator output.

2. A generator according to claim 1, wherein

said clocking means repetitively clocks said first input signal into said transfer device.

3. A generator according to claim 2, wherein

prior to said first gating means collecting and gating said signal portions from said one of said plurality of stages, said clocking means clocks said first input signal in all of said plurality of stages, and after this clocking said first gating means selectively collects and gates said signal portions from said one of said plurality of stages to said generator output according to a first predetermined law in order to form at said generator output successive portions of said first variable output signal.

4. A generator according to claim 1, wherein

said first gating means includes

auxiliary transfer device coupled thereto to temporarily store said collected signal portions before gating them to said generator output.

5. A generator according to claim 1, further including

a second charge transfer device having a plurality of cells and a second device output coupled to said generator output to enable said selectively collected and gated signal portions to be combined with signals appearing at said second device output to provide a second variable output signal.

6. A generator according to claim 5, wherein

prior to said first gating means collecting and gating said signal portions from said one of said plurality of stages, a second input signal is clocked in all of said plurality of cells to enable said second input signal to be combined with said successive portions of said first variable output signal to provide said second variable output signal.

7. A generator according to claim 6, wherein

said successive portions of said first variable output signal are all factions of said second input signal.

8. A generator according to claim 5, wherein

said second transfer device is coupled in cascade with said first transfer device and is clocked by said clocking means coupled to all of said plurality of cells, said generator output being connected to said second device output.

9. A generator according to claim 6, further including

a third charge transfer device having a plurality of auxiliary cells coupled in cascade with said first transfer device;

and

second gating means formed as part of said first and third transfer devices coupled to said auxiliary cells to selectively collect and remove portions of signals stored therein according to a predetermined law and to enable signal portions remaining in said third transfer device and stepped therethrough to form successive portions of a third variable output signal.

10. A generator according to claim 9, wherein

said clocking means is coupled to said third transfer device to repetitively clock a third input signal in said third transfer device.

11. A generator according to claim 10, wherein

said second gating means controls said third transfer device in such a way that said third variable output signal has a staircase shape with an end value equal to the value of said second input signal.

12. A generator according to claim 11, wherein

said clocking means, said first gating means and said second gating means operate in such a way that said third variable output signal and said second variable output signal successively appear at said second device output.

13. A generator according to claim 9, wherein

each of said plurality of cells and each of said plurality of auxiliary cells includes several stages.

14. A generator according to claim 9, wherein

said second gating means is able to deviate and remove charge portions from each of said aixiliary cells.

15. A signal converter comprising:

a comparator for comparing a comparator input signal to be converted with a first reference signal and for providing a comparator output signal when said comparator input signal and said first reference signal satisfy a predetermined relationship, said comparator having a first input to receive said comparator input signal, a second input for receiving said first reference signal and an output at which appears said comparator output signal; and

a signal generator according to claim 38 to provide said first reference signal.

16. A converter according to claim 15, wherein

said first reference signal includes said third and second variable output sginals successively appearing at said second device output.

17. A converter according to claim 16, wherein

said second gating means is coupled to said comparator output to be controlled by said comparator output signal in such a way that said staircase-shaped third variable output signal includes a first part varying between said third input signal and a second reference signal and a second part varying between said second reference signal and said end value, said end value being equal to the value of a step of said first part of said third variable output signal for which said comparator output signal becomes activated during the comparison of said first part of said third variable output signal with said comparator input signal, or zero when said comparator output signal does not become activated during said comparison.

18. A converter according to claim 17, wherein

said first part of said third variable output signal varies according to a segmented law.

19. A converter according to claim 18, wherein

said first gating means is coupled to said comparator output to be controlled by said comparator output signal in such a way that said second variable output signal includes a fixed part having said second input signal on which are successively superimposed fractions equal to said second input signal divided by 2, 4, 8, . . . , said fractions being continued to be superimposed as long as said comparator output signal remains activated.

20. A converter according to claim 19, wherein

said second variable output signal determines to which of a number of equal factions of a segment of said regimented law said comparator input signal corresponds.

21. A converter according to claim 15, further including

a fourth transfer device coupled to said clocking means and said first input of said comparator, said fourth transfer device being clocked in synchronism with said first, second and third transfer devices and said comparator input signal being stepped through said fourth transfer device before being coupled to said first input of said comparator.

22. A converter according to claim 21, wherein

said fourth transfer device is a charge transfer device.

23. A converter according to claim 16, wherein

said first transfer device includes

further gating means to selectively enable and prevent said first reference signal at said second device output to be applied to said second input of said comparator.

24. A converter according to claim 21, wherein

said converter comprises

a first overall transfer device including said first, second and third transfer devices,

said fourth transfer device,

a second overall transfer device similar to said first overall transfer device,

a fifth transfer device similar to said fourth transfer device,

the output of said first overall transfer device being coupled to said second input of said comparator,

the output of said second overall transfer device being coupled to said first input of said comparator,

the output of said fourth transfer device being coupled to said first input of said comparator,

the output of said fifth transfer device being coupled to said second input of said comparator,

first means to apply a first predetermined reference signal to the input of both said second overall transfer device and said fifth transfer device and to apply a sum signal formed by said first predetermined reference signal and an input signal to be converted to the input of said fourth transfer device, and

additional gating means to apply selectively to the input of said first overall transfer device a sum or a difference of said first predetermined reference signal and a second predetermined reference signal depending on the sign of said input signal to be converted which is determined by said fourth and fifth transfer devices.