Polycrystalline silicon oxidation method for making shallow and deep isolation trenches

• US 4,238,278 A
• Filed: 06/14/1979
• Issued: 12/09/1980
• Est. Priority Date: 06/14/1979
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Antipov, Igor
• Primary Examiner(s): Massie, Jerome W.
• Application Number:
  US06/048,561
• Time in Patent Office: 544 Days
• Field of Search: 156/628, 156/653, 156/648, 156/649, 156/657, 156/662, 357/49, 427/93, 427/399, 427/95
• US Class Current: 438/426
• CPC Class Codes: H01L 21/76202 using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO H01L21/76235 takes precedence; together with vertical isolation, e.g. LOCOS in a SOI substrate, H01L21/76264
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264
• CPC Class Codes: H01L 21/763 Polycrystalline semiconductor regions H01L21/76264 takes precedence
• CPC Class Codes: Y10S 148/05 Etch and refill
• CPC Class Codes: Y10S 148/051 Etching
• CPC Class Codes: Y10S 148/085 Isolated-integrated

Abstract

A method for making both shallow and deep recessed oxide isolation trenches in silicon semiconductor substrates. A semiconductor substrate is reactively ion etched through mask apertures defining the deep trench areas and at least the perimeters of the shallow trench areas, the etched trenches are oxidized and partially filled with chemical-vapor-deposited (CVD) oxide. The filling of the trenches is completed with polycrystalline silicon. The excess polycrystalline silicon covering substrate areas other than the deep trench areas is removed down to the underlying CVD oxide.

The shallow trench areas are etched next, some of the shallow trench areas connecting with the upper regions of the deep trench areas. The monocrystalline and polycrystalline silicon in the respective shallow trench areas are removed and the remaining silicon is thermally oxidized.

Claims

1. The method for forming narrow, deep, recessed oxide isolation filled trenches and wide, deep recessed oxide isolation filled trenches in a monocrystalline silicon substrate comprising:

etching said substrate through mask apertures in a masking layer defining said narrow trenches and the perimeters of said wide trenches,

thermally oxidizing the surfaces of said trenches,

partially filling said trenches with a dielectric material,

completing the filling of said trenches with polycrystalline silicon,

etching said substrate through mask apertures in the masking layer defining shallow trenches, some of said shallow trenches coinciding with the upper regions of said filled deep trenches and others of said shallow trenches bridging between said filled deep trenches, and thermally oxidizing the remaining polycrystalline silicon in said deep trenches and the monocrystalline silicone in said shallow trenches.

2. The method defined in claim 1 and further including removing said polycrystalline silicon covering substrate areas other than said deep trench areas prior to etching said substrate through mask apertures defining said shallow trenches.

3. The method defined in claim 1 wherein said dielectric material comprises chemical vapor deposited silicon dioxide.

4. The method defined in claim 1 wherein said masking layer comprises a layer of silicon dioxide covered by a layer silicon nitride.