Process and an apparatus for automatically recognizing the position of semiconductor elements

• US 4,238,780 A
• Filed: 04/02/1979
• Issued: 12/09/1980
• Est. Priority Date: 04/14/1978
• Status: Expired due to Term

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Doemens, Guenter
• Primary Examiner(s): Boudreau, Leo H.
• Application Number:
  US06/026,038
• Time in Patent Office: 617 Days
• Field of Search: 340/146.3 H, 340/146.3 AE, 340/146.3 AC, 356/375, 356/398, 250/561, 358/101, 364/468, 364/488, 364/489, 364/490, 364/491, 364/559, 364/560
• US Class Current: 382/151
• CPC Class Codes: G01B 11/022 by means of tv-camera scanning
• CPC Class Codes: G01D 5/26 characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light
• CPC Class Codes: G06T 7/74 involving reference images or patches

Abstract

The position of semiconductor elements is recognized automatically by opto-electronic, non-contact techniques. Recognition of the position of the semiconductor elements, such as integrated circuits, is largely independent of pattern and surface properties, in particular for adjustment purposes in automatic wire assembly and in the transfer of semiconductor elements to automatic alloying/adhesive equipment. The positions of the semiconductor elements are determined via a rectilinear cut edge or system edge by means of a row-by-row scanning which leads from the surroundings of an element and moves across the element, with the rows running parallel or virtually parallel to the direction of the rectilinear edge. The instantaneous intensities of the brightness values are integrated row-wise or row-section-wise, the resulting values are stored and the difference of the results of consecutive rows is formed. Then, only the polarity which corresponds to the investigated edge is used for further analysis. The result is weighted with a factor which corresponds to the roughness of the particular position in the image. The differences in a rough zone are distinctly weakened and differences in a smooth zone are distinctly emphasized, and by means of an additional electronic width evaluation, sharp-edged lines are emphasized in relation to wide junctions so that, on this basis, by means of row counting, a signal for correcting the position of the chip is formed and is output in order to correct the position.

Claims

1. A method for automatically recognizing the position of a semiconductor element by investigating the same with respect to at least one rectilinear edge of an element to obtain adjustment information, comprising the steps of:

illuminating the semiconductor element;

imaging and optically scanning across a semiconductor element image and its surroundings row-by-row in rows which are substantially parallel to the investigated edge and generating electrical signals representing the light intensity of the optically scanned rows;

integrating the instantaneous values of the electrical signals of each row;

storing the integrated values;

comparing the integrated values of adjacent rows and producing bipolar difference values therefrom;

weighting the difference values of one polarity with a predetermined factor which corresponds to the roughness of the particular position in the image decreasing the difference values in a rough zone and increasing the difference values in a smooth zone;

forming further difference values from the weighted difference values to emphasize sharp-edge lines of the image; and

providing, by row counting, a signal for correcting the position of the semiconductor element.

2. The method of claim 1, comprising the further steps of:

storing the scanning results for columns which are orthogonal to the scanning direction by row number in which they occur indicating their positions in the column direction; and

logically comparing the results transversely of the columns to distinguish faulty results from correct results of the investigated edge.

3. The method of claim 1, comprising, in order to determine the x and y coordinates and the angle of rotation (φ

), the steps of;

performing the listed steps for a plurality of fields of vision of the semiconductor element.

4. The method of claim 2, further defined as:

performing the listed steps for three fields of vision of the semiconductor element.

5. The method of claim 2, further defined as:

performing the steps of scanning in the same direction for each field of vision.

6. The method of claim 2, further defined as:

performing the steps of scanning in different directions for each field of vision.

7. The method of claim 2, further defined as:

performing the steps of scanning in orthogonal directions for the fields of vision.

8. The method of claim 1, wherein the step of illuminating is further defined as:

orienting the direction of illumination to exploit the thickness of the element and produce a well defined edge shadow representing a cut edge.

9. The method of claim 8, wherein the element also has an associated system edge, and in order to detect the system edge, the step of illuminating is further defined as:

illuminating the semiconductor element with direct parallel illumination so that the inclination of the system edge reflects the light for imaging in a weakened form so as to appear as a narrow, dark line.

10. The method of claim 8, wherein:

the step of illuminating is carried out at an angle inclined a few degrees to the perpendicular; and

the step of imaging is carried out at the angle of reflection.

11. A method for automatically recognizing the position of a semiconductor element by investigating the same with respect to at least one rectilinear edge of the element to obtain adjustment information, comprising the steps of:

illuminating the semiconductor element;

imaging and optically scanning across the semiconductor element image and its surrounding line-by-line substantially parallel to the investigated edge and generating video signals representing the light intensity of the scanned lines;

differentiating and rectifying the video signals;

integrating the rectified signals on a line-by-line basis;

phasing the integrated signals with respect to one another; and

integrating the phased signals so that rough zones which manifest singular smooth locations are integrated into a closed surface to prevent errors.

12. The method of claim 11, wherein the edge is the cut edge of a semiconductor chip which also has an adjacent system edge, comprising the further step of:

comparing the integrated signals in the region of the cut and system edges to identify the cut edge.

13. The method of claim 11, wherein the semiconductor element is a chip having a cut edge and a system edge, and the step of illuminating is further defined as:

providing parallel incident illumination of the cut and system edges; and

comprising the further step of;

weighting the line-by-line integrated values with a predetermined signal representing the roughness;

comparing the weighted and unweighted signals to determine, on the basis of line-by-line differences, minimum and maximum values which represent the cut and system edges.

14. The method of claim 11, wherein the semiconductor element is a chip having a cut edge and a system edge, wherein the step of imaging and scanning is further defined as:

imaging and scanning with three fields of vision located such that two fields of vision are spaced along one side of the chip and the third field of vision is along a side of the chip which is transverse to the one side; and

,

in order to prevent false recognitions in each of the three fields of vision, comprising the further steps of;

determining, from the information obtained in two columns transverse of the line scanning direction for at least two of the fields of vision, respective angles of rotation; and

comparing the angles for equality.

15. The method of claim 11, wherein the step of imaging is further defined as:

imaging two orthogonally-arranged fields of vision at respective orthogonal edges of the semiconductor element;

superposing the resulting two images to produce a single image; and

applying the single image to a single image converter.

16. A method for automatically recognizing the position of a semiconductor element by investigating the same with respect to an edge of the element to obtain adjustment information, comprising the steps of:

illuminating the element with light to produce a shadow which defines the edge by a dark/light transition;

imaging and scanning the element image line-by-line substantially parallel to the edge to produce a video signal;

integrating the video signal in a line-by-line fashion;

forming difference signals from successive ones of the line-by-line integrated signals;

weighting the difference signals with a predetermined value representing element roughness;

comparing the weighted and unweighted signals in order to obtain a comparison value; and

sensing for the maximum comparison value, maximum value which represents the investigated edge.

17. The method of claim 16, wherein the edge is the cut edge of a semiconductor chip which also has a system edge, and further comprising the steps of:

sensing for the minimum comparison value, which minimum value represents the system edge.

18. A method for automatically recognizing the position of a semiconductor element by investigating the same with respect to an edge of the element to obtain adjustment information, comprising the steps of:

illuminating the element with light to produce a shadow which defines the edge by a dark/light transition;

imaging and scanning the element image line-by-line substantially parallel to the edge to produce a video signal;

integrating the video signal in a line-by-line fashion;

forming difference signals from successive ones of the line-by-line integrated signals;

weighting the difference signals with a predetermined value representing element roughness;

comparing the weighted and unweighted signals in order to obtain a comparison value; and

sensing for the minimum comparison value, minimum value which represents the investigated edge.

19. The method of claim 18, wherein the edge is the cut edge of a semiconductor chip which also has a system edge, and further comprising the step of:

sensing for the maximum comparison value, which maximum value represents the system edge.

20. A method for automatically recognizing the position of a semiconductor element by investigating the same with respect to at least one rectilinear edge of the element to obtain adjustment information, comprising the steps of:

illuminating the semiconductor element;

imaging and optically scanning across the semiconductor element image and its surroundings line-by-line substantially parallel to the investigated edge and generating video signals representing the light intensity of the scanned lines;

differentiating and rectifying the video signals;

integrating the rectified signals on a line section-by-line section basis;

phasing the integrated line-section signals with respect to one another; and

integrating and integrated and phased line section signals so that rough zones which manifest singular smooth locations are integrated into a closed surface to prevent errors.

21. Apparatus for automatically recognizing the position of a semiconductor element by investigating the same with respect to at least one rectilinear edge of the element to obtain adjustment information, comprising:

means for illuminating the semiconductor element;

means for imaging and optically scanning across the semiconductor element image and its surroundings line-by-line substantially parallel to the investigated edge, including means for generating video signals representing the light intensity of the scanned lines;

means for differentiating and rectifying the video signals;

means for integrating the rectified signals on a line-by-line basis;

means for phasing the integrated signals with respect to one another; and

means for integrating the phased signals so that rough zones which manifest singular smooth locations are integrated into a closed surface to prevent errors.

22. The apparatus of claim 21, wherein the edge is the cut edge of a semiconductor chip which also has an adjacent system edge, comprising:

means for comparing the integrated signals in the region of the cut and system edges to identify the cut edge.

23. Apparatus for automatically recognizing the position of a semiconductor element by investigating the same with respect to at least one rectilinear edge of the element to obtain adjustment information, comprising:

a light source for illuminating the semiconductor element;

an optic for imaging and an image converter optically linked thereto for optically scanning across, the semiconductor element image and its surroundings line-by-line substantially parallel to the investigated edge and generating video signals representing the light intensity of the scanned lines;

differentiating means connected to said converter and rectifier means connected to said differentiating means for differentiating and rectifying the video signals;

first integrating means connected to said rectifier means for integrating the rectified signals on a line section-by-line section basis;

phasing means connected to said first integrating means for phasing the integrated signals with respect to one another; and

second integrating means connected to said phasing means for integrating the phased signals to that rough zones which manifest singular smooth locations are integrated into a closed surface to prevent errors.

24. The apparatus of claim 23, wherein the edge is the cut edge of a semiconductor chip which also has an adjacent system, comprising:

means for comparing the integrated signals in the region of the cut and system edges to identify the cut edges.

25. Apparatus for automatically recognizing the position of a semiconductor element by investigating the same with respect to an edge of the element to obtain adjustment information, comprising:

means for illuminating the element with light to produce a shadow which defines the edge by a dark/light transition;

means for imaging and scanning the element image line-by-line substantially parallel to the edge to produce a video signal;

means for integrating the video signals in a line-by-line fashion;

means for forming difference signals from successive ones of the line-by-line integrated signals;

means for weighting the difference signals with a predetermined value representing element roughness;

means for comparing the weighted and unweighted signals in order to obtain a comparison value; and

means for sensing the maximum comparison value, which maximum value represents the investigated edge.

26. The apparatus of claim 25, wherein the edge is the cut edge of a semiconductor chip which also has a system edge, and further comprising:

means for sensing for the minimum comparison value, which minimum value represents the system edge.

27. Apparatus for automatically recognizing the position of a semiconductor element by investigating the same with respect to an edge of the element to obtain adjustment information, comprising:

means for illuminating the element with light to produce a shadow which defines the edge by a dark/light transition;

means for imaging and scanning the element image line-by-line substantially parallel to the edge to produce a video signal;

means for integrating the video signal in a line-by-line fashion;

means forming difference signals from successive ones of the line-by-line integrated signals;

means for weighting the difference signals with a predetermined value representing element roughness;

means for comparing the weighted and unweighted signals in order to obtain a comparison value; and

means for sensing for the minimum comparison value, minimum value which represents the investigated edge.

28. The apparatus of claim 27, wherein the edge is the cut edge of a semiconductor chip which also has a system edge, and further comprising:

means for sensing for the maximum comparison value, which maximum value represents the system edge.

29. Apparatus for automatically recognizing the position of a semiconductor element by investigating the same with respect to at least one rectilinear edge of an element to obtain adjustment information, comprising:

illuminating means for illuminating the semiconductor element;

means for imaging and optically scanning across a semiconductor element and its surroundings row-by-row in rows which are substantially parallel to the investigated edge, including means for generating electrical signals representing the light intensity of the optically scanned rows;

integrating means for integrating the instantaneous values of the electrical signals of each row;

storage means storing the integrated values;

signal comparison means for comparing the integrated values of adjacent rows and producing bipolar difference values therefrom;

weighting means for weighting the difference values of one polarity with a predetermined factor which corresponds to the roughness of the particular position in the image decreasing the difference values in a rough zone and increasing the difference values in a smooth zone;

means for forming further difference values from the weighted difference values to emphasize sharp-edge lines of the image; and

output means, including a row counter, for providing, by row counting, a signal for correcting the position of the semiconductor element.

30. The apparatus of claim 29, comprising:

means for storing the scanning results for columns which are orthogonal to the scanning direction by row number in which they occur indicating their positions in the column direction; and

logic means for logically comparing the results transversely of the columns to distinguish faulty results from correct results of the investigated edge.

31. The apparatus of claim 29, wherein the semiconductor element is a semiconductor chip having cut and system edges and at least one corner which includes the cut and system edges, and wherein said imaging and scanning means comprises:

a pair of image converters each having a scanning direction orthogonal to the scanning direction of the other substantially parallel to the relevant edges in a respective field of vision; and

an optic for imaging the corner of the chip on the image converters.

32. The apparatus of claim 31, and further comprising:

means for displacing one of said fields of vision along one side of the chip for scanning;

means for producing like further difference signals from the displaced field of vision; and

means for comparing the further difference signals of one of said fields and said displaced field to obtain angle of rotation information.

33. The apparatus of claim 29, wherein the semiconductor element is a semiconductor chip having cut and system edges and at least one corner which includes the cut and system edges, and wherein said imaging and scanning means comprises:

a single image converter for scanning the image substantially parallel to one of the edges; and

an optical image rotation means for rotating the image for scanning substantially parallel to the other edge.