Test circuit for automotive passenger restraint systems

• US 4,243,971 A
• Filed: 10/09/1979
• Issued: 01/06/1981
• Est. Priority Date: 11/28/1978
• Status: Expired due to Term

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Werner, Peter, Suchowerskyj, Wadym, Seibel, Berthold
• Primary Examiner(s): Waring, Alvin H.
• Application Number:
  US06/082,572
• Time in Patent Office: 455 Days
• Field of Search: 340/52 R, 340/52 E, 340/52 H, 340/61, 340/514, 340/516, 340/573, 340/667
• US Class Current: 340/438
• CPC Class Codes: B60R 21/0173 Diagnostic or recording means therefor

Abstract

In order to provide for complete testing of all the components of a trigger circuit for actuating an automotive passenger restraint system, and thereby to prevent unintentional deployment of restraint systems, for example air bags, the test circuit performs a testing program which is initiated at the moment when electric power is applied to the passenger safety system. The testing program checks the operation of the electronic discriminator circuits as well as the correct operation of the power output circuit by generating a simulated triggering signal. The actuation of the passenger restraint system is prevented during the test cycle by blocking an auxiliary semiconductor switch connected in series with the power output transistor of the triggering circuit.

Claims

1. A test circuit for automotive passenger safety systems, said safety system including a trigger signal discriminator and a power output stage actuated by said discriminator, said power output stage serving to actuate said safety system, and wherein, according to the invention, said test circuit comprises a semiconductor switch (16) which may be placed in electrical series connection with said power output stage (14) and said safety system (11), said test circuit including means for preventing simultaneous conduction of said switch (16) and said power output stage (14) during a test.

2. A test circuit according to claim 1, further comprising a threshold circuit (20) the input of which is connected to a point lying between said semiconductor switch (16) and said power output stage (14) for generating an output signal when a simulated trigger signal has actuated said power output stage (14) during a test.

3. A test circuit according to claim 1, further comprising a resistor (18) in parallel with said power output stage (14) and a resistor (17) in parallel with said semiconductor switch (16), the resistance value of said resistors (17, 18) being high when compared to the resistance of said safety system (11) and still further comprising two threshold switches (19,20), the inputs of which receive the voltage prevailing between said power output stage and said semiconductor switch (16), the triggering threshold of said switch (19) lying slightly above a reference value and the triggering threshold of said switch (20) lying slightly below said reference value, said reference value being the voltage which occurs at the inputs of said switches (19,20) when said power output stage (14) and said semiconductor switch (16) are both in the non-conducting state and when the potential of the power supplied to the circuit is nominal.

4. A test circuit according to claim 3, further comprising timing means (34-37) for timing sequential steps of a test program, the sequence of steps being controlled by logical gate circuits and taking place only if a previous step proved to be nominal.

5. A test circuit according to claim 4 wherein, in a first testing step, both said power output stage (14) and said semiconductor switch (16) are blocked and only said threshold switch (19) responds for nominal conditions of said system.

6. A test circuit according to claim 5, wherein, in a further testing step, a trigger signal is generated, causing triggering of both threshold switches (19,20) for nominal test conditions.

7. A test circuit according to claim 6, wherein, in a further testing step which begins at the end of a trigger signal, nominal test conditions are indicated by response of only said threshold switch (19).

8. A test circuit according to claim 5, wherein, in a further testing step, said semiconductor switch (16) is rendered conducting, and nominal test conditions are indicated by triggering of one of said threshold switches (19,20).

9. A testing circuit according to claim 8, wherein said last named testing step is the final testing step.

10. A testing circuit according to claim 1, comprising a signaling device (22) and means for energizing said signaling device (22) during the first testing step and de-energizing said signaling device (22) during the last testing step.