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Video display processor

  • US 4,243,984 A
  • Filed: 03/08/1979
  • Issued: 01/06/1981
  • Est. Priority Date: 03/08/1979
  • Status: Expired due to Term
First Claim
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1. In a video display system for use with a raster-scanned video display unit, the system including:

  • a random access memory having stored therein a first ordered array of digital code elements which map a set of video color codes into the M columns of N rows of video display elements comprising a first video image;

    a second ordered array of digital code elements which map said set of video color codes into the S columns of T rows of video display elements comprising a second video image; and

    a third array containing a column displacement U and a row displacement V for the display of the second video image relative to the first video image, where 1≦

    S≦

    M, 1≦

    T≦

    N, 1≦

    U≦

    M and 1≦

    V≦

    N;

    a video display processor for providing a composite video signal for application to the video display unit, whereby the first video image may be displayed with the second video image superimposed thereon at said column and row displacements, the video display processor comprising;

    sequence control means providing a cyclic column count X and a cyclic row count Y indicative of the time sequential position of the raster scan;

    memory control means for selectively retrieving from the random access memory, portions of the first, second and third arrays;

    overlay control means, cooperating with the memory control means in synchronization with the column and row counts, for providing a first pattern signal comprising the digital code element in the first array which maps the video display element in the column X of the row Y of the first video image when 1≦

    X≦

    M and 1≦

    Y≦

    N, and for providing a second pattern signal comprising the digital code element in the second array which maps the video display element in the column (X-U+1) of the row (Y-B+1) of the second video image when U≦

    X<

    (U+S) and (V≦

    Y<

    (V+T);

    priority selector means connected to the overlay control means for receiving the first and second pattern signals, selecting the second pattern signal in response to receiving the second pattern signal, selecting the first pattern signal when the second pattern signal is not selected, and providing a video control signal comprised of the video color codes mapped by the digital code elements comprising the selected pattern signal; and

    composite video generating means, cooperating with the priority selector means in synchronization with the column and row counts, for generating said composite video signal in accordance with the video color codes of the video control signal.

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