Apparatus for programming a PROM by propagating data words from an address bus to the PROM data terminals

• US 4,244,032 A
• Filed: 12/16/1977
• Issued: 01/06/1981
• Est. Priority Date: 12/16/1977
• Status: Expired due to Term

• Current Assignee: Douglas E. Oliver
• Original Assignee: Douglas E. Oliver
• Inventors: Oliver, Douglas E.
• Primary Examiner(s): Chapnick, Melvin B.
• Application Number:
  US05/861,186
• Time in Patent Office: 1,117 Days
• Field of Search: 364/900 MS File, 364/200 MS File, 364/716, 365/94, 365/96, 340/147 R, 340/147 P, 340/149 A, 340/166 R
• US Class Current: 711/103
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Abstract

An adapter converts an instruction-controlled processor such as a microprocessor into a PROM programming apparatus. The adapter is compatible with the type of processor having readout circuitry for applying a multibit signal via an internal address bus to a processor socket into which an addressable memory such as an already programmed PROM is inserted for normal processor operation. During a programming operation, the processor socket does not contain a PROM; instead, the adapter is connected between the processor socket and a PROM being programmed. Control circuitry in the adapter receives the multibit signal so as to control the entering of a plurality of data words into the PROM.

Claims

1. An adapter for use in connection with an instruction-controlled processor to form an apparatus for carrying out a programming operation to program a PROM having a plurality of locations and a plurality of terminals defining a set of address terminals and a set of data terminals, at least one of the terminals being a program control terminal, the processor having processor socket means for having a pre-programmed PROM inserted therein for use in normal operation of the processor, an internal address bus connected to the processor socket means, and reading means for use in such normal operation to read out such a pre-programmed PROM, the reading means including means for causing the internal address bus to carry a multibit signal, the encoding of which in normal operation of the processor is such as to define an address each time the processor executes a predetermined instruction, the reading means further including means for supplying timing signals used in selecting such pre-programmed PROM, the adapter comprising:

an adapter input for connecting the adapter to the processor, the adapter input including adapter plug means for temporary insertion into the processor socket means so that the multibit signal is received by the adapter from the internal address bus;

adapter socket means into which a PROM to be programmed is inserted for the programming operation; and

control circuit means for entering a plurality of data words into such inserted PROM, the control circuit means including addressing means connected to the adapter socket means for applying a sequence of addresses to the set of address terminals of such inserted PROM so that each such data word is entered into a separate location, signal propagating means connected between the adapter plug means and the adapter socket means for propagating to the set of data terminals of such inserted PROM each multibit signal of a sequence of such multibit signals received from the internal address bus, and pulse generating means connected by the adapter input to receive the timing signals so as to respond to the timing signals to apply a control signal to the program control terminal of such inserted PROM to cause entry into such inserted PROM each multibit signal that is propagated from the internal address bus to the set of data terminals.

2. An adapter according to claim 1, wherein the addressing means includes a counter and means for stepping addressing means includes a counter and means for stepping the counter to cause it to generate a sequence of addresses for application to the set of address terminals of such inserted PROM.

3. An adapter according to claim 2, wherein the signal propagating means includes an adapter data bus connected by the adapter socket means to the set of data terminals of such inserted PROM, and means connected by the adapter plug means to the internal address bus for responding to each of a sequence of addresses defined by the multibit signal by applying a data word to the adapter data bus, each such data word being a copy of at least a portion of the respective address.

4. An adapter according to claim 1, wherein the addressing means includes an adapter address bus connected between the adapter plug means and the adapter socket means for carrying a time-division multiplex signal that alternately defines an entry address and a data word, and wherein the control circuit means includes means for causing the pulse generating means to generate a program pulse when the multiplex signal defines an entry address.

5. An adapter according to claim 1, wherein the adapter input includes means for receiving operating power from the processor.

6. An adapter for converting into a PROM programmer an instruction-controlled processor which has processor socket means adapted to have inserted in it a pre-programmed PROM having a plurality of locations, a set of address terminals, a set of data terminals, a set of operating power terminals, and a control terminal, and which further has an internal address bus connected to the processor socket means and PROM reading means for causing the internal address bus to carry a multibit signal, the encoding of which in normal operation of the processor is such as to define an address each time a read instruction is executed to read a data word from such an inserted pre-programmed PROM, the PROM reading means further including means for supplying timing signals used in selecting such pre-programmed PROM, the adapter comprising:

adapter plug means for effecting a connection between the adapter and such a processor, the adapter plug means being inserted into the processor socket means of such connected processor for a PROM programming operation, whereby the adapter receives the multibit signal from the internal address bus;

adapter socket means into which a PROM to be programmed is inserted for the programming operation; and

control circuit means operative in the course of execution by the processor of sequentially executed read instructions to enter a plurality of data words into such inserted PROM, the control circuit means including addressing means connected to the adapter socket means for applying a sequence of addresses to the set of address terminals of such inserted PROM so that each such data word is entered into a separate location, signal propagating means connected between the adapter plug means and the adapter socket means for propagating to the set of data terminals of such inserted PROM each multibit signal of a sequence of such multibit signals received from the internal address bus, and pulse generating means connected to receive the timing signals so as to respond thereto to apply a control signal to the control terminal to cause entry into such inserted PROM each multibit signal that is propagated from the internal address bus to the set of data terminals.

7. An adapter according to claim 6, wherein the addressing means comprises a counter and means fo stepping the counter to cause it to generate a sequence of addresses for application to the set of address terminals of such inserted PROM.

8. An adapter according to claim 6, wherein the control circuit means is arranged to carry out a signal sorting operation in the course of entering each of the plurality of data words, and wherein the signal propagation means includes register means and means operative in the course of execution by the processor of the earlier of two consecutively executed read instructions for loading a data word into the register means, the data word so loaded into the register means being a copy of at least a portion of the multibit signal then being supplied by the internal address bus, the register means having an output connected to the adapter socket means so that the data so loaded into the register means is present on the set of data terminals of such inserted PROM in the course of execution by the processor of the later of the two read instructions, and wherein the addressing means includes an adapter address bus for carrying the multibit signal to the set of address terminals of such inserted PROM.