Control circuit for establishing voltage-controlled or injection-locked operation of a synthesizer reference oscillator

• US 4,247,834 A
• Filed: 02/15/1979
• Issued: 01/27/1981
• Est. Priority Date: 02/15/1979
• Status: Expired due to Term

• Current Assignee: GTE International, Inc. (Verizon Communications Inc.)
• Original Assignee: GTE Products Corporation
• Inventors: Hand, Wilfred L., Brun, Craig W.
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US06/012,258
• Time in Patent Office: 712 Days
• Field of Search: 331/1 R, 331/10, 331/16, 331/18, 331/172
• US Class Current: 331/172
• CPC Class Codes: H03J 7/065 the counter or frequency divider being used in a phase locked loop
• CPC Class Codes: H03L 7/24 using a reference signal directly applied to the generator

Abstract

In a synthesizer system having a reference oscillator selectively operable in either a voltage-controlled or an injection-locked mode, a circuit for effecting the appropriate mode of operation. The circuit includes an analog gate coupled between the output of a crystal oscillator and the input of the reference oscillator. The analog gate is driven by a logic element responsive to a plurality of signals indicative of specific operating conditions. In particular, the circuit assures that the reference oscillator is coupled to the crystal oscillator, that is, the reference oscillator operates in the injection locked mode, while the synthesizer PLL achieves acquisition.

Claims

1. In a reference oscillator for a frequency synthesizer, the oscillator selectively capable of operation either in an injection-locked mode wherein oscillator operating frequency is determined by the frequency of a crystal-controlled oscillator or in a voltage-controlled mode wherein the oscillator operating frequency is determined by the voltage applied to the oscillator tuning voltage control terminal, the improvement comprising:

a control circuit for selectively effecting reference oscillator operation in either the injection-locked or voltage-controlled mode, the circuit comprising;

a logic element having an input coupled to a signal source determinative of the desired reference oscillator mode of operation, and

an analog gate coupled to the crystal-controlled oscillator and driven by the logic element for selectively coupling the crystal-controlled oscillator to the reference oscillator to establish the injection-locked mode and for isolating the crystal-controlled oscillator from the reference oscillator to establish the voltage-controlled mode.

2. An improvement as defined in claim 1 wherein the logic element comprises:

a multiple input NOR gate having an input coupled to the source of signals determinative of the reference oscillator mode of operation and a first output coupled to an input of the analog gate; and

an inverter having an input coupled to the output of the NOR gate and an output coupled to another input of the analog gate.

3. An improvement as defined in claim 1 wherein the analog gate comprises:

first diode means having one end coupled to a first output of the logic element, and

second diode means having one end coupled to the other end of the first diode means and another end coupled to a second output of the logic element.

4. An improvement as defined in claim 2 wherein the analog gate comprises:

a first diode having an anode coupled to a first input of the analog gate, and

a second diode having a cathode connected to the cathode of the first diode and an anode coupled to a second input of the analog gate.

5. An improvement as defined in either claim 3 or claim 4 further comprising bypassing means coupled between an input of the analog gate and a reference potential.

6. An improvement as defined in claim 2 wherein the signal source includes a signal indicative of synthesizer operation within a prescribed range of frequencies.

7. An improvement as defined in claim 2 wherein the signal source includes a logic signal indicative of reference oscillator operation in an automatic frequency control mode.

8. An improvement as defined in claim 2 wherein the signal source includes an acquisition delay signal for effecting crystal-controlled operation of the reference oscillator for a period of time sufficient to assure synthesizer acquisition subsequent to a change in the source of reference oscillator tuning voltage.

9. A control circuit for a synthesizer reference oscillator for selectively effecting operation of the oscillator in either a crystal-controlled or a voltage-controlled mode, the circuit comprising:

a logic element having multiple inputs, at least one of which is connected to a signal indicating the desired oscillator mode of operation, and outputs characterized by opposite polarities, and

an analog gate having a first input coupled to an output of the logic element having one polarity and a second input coupled to an output of the logic element having the other polarity, one of the inputs adapted to be connected to a source of crystal oscillator signals so that in the crystal-controlled mode those signals appear at the output of the analog gate but are otherwise inhibited.

10. A control circuit as defined in claim 9 wherein the analog gate comprises:

first diode means having one end coupled to a A output of the logic element, and

second diode means have one end coupled to a B output of the logic element, the remaining ends of the diodes being connected in common.

11. A control circuit as defined in claim 10 further comprising bypass means coupled between one end of one of the diode means and a reference potential wherein one end of the other diode means is coupled to the source of crystal oscillator signals.

12. A circuit as defined in either claim 9 or 10 wherein the logic element comprises:

a multiple-input NOR gate having an output connected to the first input of the analog gate, and

an inverter having an input coupled to the output of the NOR gate and an output coupled to the second input of the analog gate.

13. A circuit as defined in claim 12 wherein one input of the NOR gate is coupled to a signal indicating operation in an AFC mode.

14. A circuit as defined in claim 12 wherein one input of the NOR gate is coupled to a signal indicating operation within a particular range of frequencies.

15. A circuit as defined in claim 12 wherein one input of the NOR gate is coupled to an acquisition delay signal so that the reference oscillator operates in the crystal-controlled mode during the time required for the synthesizer to achieve acquisition.

16. In a synthesizer system characterized by a reference oscillator selectively operable in either an injection-locked or voltage controlled mode, an improvement in the form of a control circuit for determining the reference oscillator mode of operation, the circuit comprising:

first logic means having at least one input coupled to a signal source indicative of a prescribed operating condition;

second logic means having an input coupled to an output of the first logic means; and

an analog gate having;

(1) a first input coupled to the output of the first logic means;

(2) a second input coupled to the output of the second logic means;

(3) an input coupled to a source of oscillator signal; and

(4) an output coupled to the reference oscillator, whereby the analog gate is driven by both logic means in response to the signal source so that the reference oscillator is coupled to the oscillator signal during the injection-locked mode.

17. An improvement as defined in claim 16 wherein the first logic means is a NOR gate and the second logic means is an inverter.

18. An improvement as defined in either claim 16 or claim 17 wherein the analog gate comprises:

first diode means coupled at one end to the output of the first logic means, and

second diode means coupled at one end to the output of the second logic means, the remaining ends of the diode means coupled in common to the reference oscillator, whereby in the injection-locked mode the first diode means is in one state of conduction and the second diode means is in the opposite state of conduction.