Composite image display apparatus

• US 4,249,211 A
• Filed: 02/05/1979
• Issued: 02/03/1981
• Est. Priority Date: 02/07/1978
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Tsuboka, Eiichi, Fujita, Tatsuo, Baba, Takaaki, Kitani, Teruo, Nakazawa, Masao, Yoshino, Hirokazu
• Primary Examiner(s): Richardson, Robert L.
• Application Number:
  US06/009,731
• Time in Patent Office: 729 Days
• Field of Search: 358/180, 358/183, 358/230, 358/237, 358/242
• US Class Current: 348/565
• CPC Class Codes: H04N 5/45 Picture in picture , e.g. displaying simultaneously another television channel in a region of the screen

Abstract

An image display apparatus has an: image signal receiver for simultaneously receiving two different image signals, a first image signal and a second image signal; a memory for writing therein the second image signal; controlling means for controlling the writing position, writing frequency, writing sequence, reading-out sequence, reading-out frequency and start-timing of reading-out of the second image signal; a display for displaying full picture information or partial picture information of the second image signal a part of a displayed picture of the first image signal by selectively reading-out the second image signal under the control of the controller; and zoom-up device for stepwisely or continuously varying the writing position and reading-out position of the second image signal controlled by the controller so as to zoomwisely display the full or partial picture of the second image signal on the picture of the first image signal.

Claims

1. An image display apparatus comprising:

image signal receiving means for simultaneously receiving a first image signal and a second image signal which are different from each other;

memory means coupled to said image signal receiving means for writing therein said second image signal into matrixed N_H ×

N_V pieces of information;

write-sampling means coupled to said memory means for converting, with a clock frequency f_CW, the second image signal in a selected horizontal line interval into N_H pieces of information for storing in said memory means;

reading-out means coupled to said memory means for reading-out, with a clock frequency f_CR, the second image signal stored in the memory means by said write-sampling means;

write-sequence control means coupled to said write-sampling means for repeating the operation conducted by said write-sampling means with a period of n_W ·

H, where H is the horizontal line interval, and f_CR =n_w ·

f_CW ;

read-out-sequence control means coupled to said reading-out means for repeating the operation conducted by said reading-out means with a period of H;

display means coupled to said reading-out means for displaying full picture information or partial picture information of said second image signal in a portion of the displayed picture of said first image signal by selecting the integral number n_W, the writing clock frequency f_CW and the reading-out clock frequency f_CR, whereby said second image signal is able to be zoomed;

and display position control means for varying the write start timing of said memory means for displaying a full or partial picture of said second image signal at the portion of the displayed picture of the first image signal.

2. An image display apparatus according to claim 1, wherein said display condition control means comprises means for presetting information for the writing positions of said second image signal corresponding to positions of pictures to be displayed by digitally coding said information for said writing positions, and means for selecting one of the preset writing positions by remote control operation.

3. An image display apparatus according to claim 1, wherein said display condition control means comprises TTL monolithic logic and means for selcting said writing positions and said read-out positions of said second image signals in said memory means by varying CR time constants of said monolithic logics.

4. An image display apparatus according to claim 1, wherein said display condition control means comprises a programmable counter for setting the frequency division ratio, for dividing horizontal synchronous signals to determine for which number of horizontal line periods said second image signal is to be written, and a remote control signal generator and a remote control signal receiver coupled to said programmable counter for supplying a digital signal to said programmable counter to set the desired frequency division ratio.

5. An image display apparatus according to claim 1, wherein said memory means comprises plural charge transfer devices arranged in a two dimensional matrix and functioning to delay analog signals and to store the signals.