Internal combustion engine ignition system test apparatus

• US 4,251,774 A
• Filed: 02/09/1979
• Issued: 02/17/1981
• Est. Priority Date: 08/14/1976
• Status: Expired due to Term

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Knodler, Jurgen
• Primary Examiner(s): Krawczewicz, Stanley T.
• Application Number:
  US06/010,815
• Time in Patent Office: 739 Days
• Field of Search: 324/384, 324/386, 324/392, 324/169
• US Class Current: 324/384
• CPC Class Codes: F02P 17/10 Measuring dwell or antidwell time

Abstract

To permit tests of: ignition timing; dwell angle; engine speed; and voltage levels, a pulse train is provided derived from the ignition system of the engine; the pulse train is applied to a frequency multiplier, preferably a phase locked loop (PLL) which provides a sequence of output pulses having a pulse repetition rate which is a multiple of the frequency of the signals or pulses of the pulse train. An AND gate has the multiplied signals applied thereto and is enabled, selectively, in accordance with the desired test. The output of the AND gate is applied to a counter which counts multiplied pulses within the interval of enabling of the AND gate, the output being applied to a digital indicator to provide a direct readable digital output; preferably, the multiplication rate is selected to provide a digital output indication which is directly readable in desired units. To determine dwell angle, enabling pulses are applied to the AND gate from the ignition system; to determine spark timing, derived enabling pulses are applied to the AND gate, derived from the ignition system upon being compared with a reference signal, for example an upper dead center (TDC) signal; to determine speed, the enabling pulses are applied with respect to a clock reference; and to determine a voltage test level, the input to the system is disconnected and the test voltage applied to a voltage controlled oscillator of the PLL.

Claims

1. Internal combustion engine ignition test system comprising

means (10) generating a signal train (b) derived from the primary or low-voltage portion of the ignition system of the engine;

a conjunctive gate (12);

a frequency multiplier (19) connected to and controlled by said signal train and providing a sequence of output pulses (c) having a pulse repetition rate which is a multiple of the frequency of said signal train, said multiple sequence being applied to said conjunctive gate (12) to an input thereof;

means (21;

30-33;

611,

     24) generating an enabling pulse train representative of a parameter to be tested;

means (22) applying the pulses of said pulse train to another terminal of said conjunctive gate (12) to pass a plurality of said output pulses through said gate in dependence on the other of the pulses of said enabling pulse train;

a counting and output stage (20) connected to and controlled by said conjunctive gate (12) and including a counter (14) counting the number of output pulses delivered from said gate during any one pulse of said enabling pulse train;

and a digitial indicator (16) providing a digital display of said counted number.

2. System according to claim 1, wherein said means applying said signals of said train includes a wave shaping stage (10).

3. System according to claim 1, wherein said frequency multiplier comprises a phase locked loop (19).

4. System according to claim 1, wherein the multiplication factor of said frequency multiplier is selected with respect to the width of the pulses of said enabling pulse train to provide an output display of said digital indicator (16) which is directly readable in desired units characterizing the parameter on the test.

5. System according to claim 4, wherein (FIG. 4) the means (22) applying the pulses of said enabling pulse train to said gate (12) are connected to the ingition coil (I) of the internal combustion engine and representative of the closing time of the breaker circuit (2) thereof, whereby the output indication of the indicator (16) will be representative of dwell angle of the ignition breaker circuit of the engine.

6. System according to claim 1, wherein (FIGS. 2 and 5) the engine is a piston engine;

the means generating the enabling pulse train comprising means (30) providing a standard signal characteristic of a predetermined position (TDC) of a piston of the engine;

and means (31) comparing the time of occurrence of said standard signal and an actual ignition signal and providing said enabling pulse train, in which each pulse has a width representative of the firing angle or spark advance of the piston,

whereby the output indication of the indicator (16) will be representative of spark timing of the engine.

7. System according to claim 6, wherein the counter (14) is an up-down counter.

8. System according to claim 7, including means (11) to preset the counter to a predetermined number, said counter counting down from said number.

9. System according to claim 1, wherein (FIG. 6) the means generating the enabling pulse train includes a time base generator (611) providing enabling timing pulses of a predetermined time interval,

whereby the output indication of the indicator (16) will be representative of speed of the engine.

10. System according to claim 1, wherein the frequency multiplier includes a phase locked loop having a voltage controlled oscillator (17), a frequency divider (18) and a phase comparator (13), the phase comparator being connected to and controlled by said signal train.

11. System according to claim 10, further comprising (FIG. 6) switch means (23) interrupting the closed loop circuit of the phase locked loop (19);

means (24) connecting a test voltage to the voltage controlled oscillator to generate output pulses at a rate controlled by said voltage;

and the means generating the enabling pulse train includes a time base generator (611) providing enabling pulses of a predetermined time interval,

whereby the output indication of the indicator (16) will be representative of the output voltage applied to said test voltage connecting means (24).

12. System according to claim 1, wherein the system is a testing system to provide for testing of at least one of:

dwell angle;

firing angle;

and wherein the means applying the pulses of said train comprises a multi-position (I, II, III) switch means (22,

     23),

and wherein

(a) to test for dwell angle, the switch means in a first position (I), connects the means (10 ) generating the signal to said conjunctive gate (12,

     412);

(b) to test for firing angle, a standard signal having a standard relationship to a predetermined angular position (TDC) of a piston of the engine is provided,

means (33) furnishing an actual ignition event signal are provided, and means (31) comparing said actual ignition event signal with said standard signal and providing a timing output signal (b'"'"') representative of the different in timing,

and, when the switch means (22) is in a second position (II), connecting said timing output signal to said conjunctive gate (12,

     512).

13. System according to claim 12, to provide, selectively, additionally for test of engine speed, wherein a time base generator (611) is provided,

and the switch means, in a third position (III), connects the time base generator to said conjunctive gate (12, 612).

14. System according to claim 13, to provide, selectively, additionally for test of a voltage level wherein the frequency multiplier comprises a phase locked loop (PLL-19) including a voltage controlled oscillator (17) controlled by said test voltage;

said switch means connects the time base to the conjunctive gate for a predetermined period of time, and the generator (611) to said conjunctive gate, disconnects said signal train from the frequency multiplier and instead connects the voltage controlled oscillator.

15. System according to claim 13, further including a memory (15) connected between the counter (14) and said indicator (16).

16. System according to claim 13, wherein the frequency multiplier includes a phase locked loop having a voltage controlled oscillator (17), a frequency divider (18) and a phase comparator (13), the phase comparator being connected to and controlled by said signal train.

17. System according to claim 16, wherein the frequency divider (18) has a controllable division ratio.

18. System according to claim 13, including means (11) to preset the counter (14) to a predetermined number.