Method of fabricating photovoltaic cells

• US 4,255,212 A
• Filed: 07/02/1979
• Issued: 03/10/1981
• Est. Priority Date: 07/02/1979
• Status: Expired due to Term

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: White, Richard M., Chappell, Terry I.
• Primary Examiner(s): Rutledge, L. Dewayne
• Assistant Examiner(s): Roy, Upendra
• Application Number:
  US06/053,929
• Time in Patent Office: 617 Days
• Field of Search: 148/1.5, 148/187, 148/175, 357/30, 357/55, 136/89 P, 136/89 SJ
• US Class Current: 438/66
• CPC Class Codes: H01L 31/047 PV cell arrays including PV cells having multiple vertical junctions or multiple V-groove junctions formed in a semiconductor substrate
• CPC Class Codes: H01L 31/0547 comprising light concentrating means of the reflecting type, e.g. parabolic mirrors, concentrators using total internal reflection
• CPC Class Codes: Y02E 10/52 PV systems with concentrators

Abstract

A solar power system including a movable platform for tracking the sun, a radiation concentrator, and a plurality of photovoltaic cell modules positioned on the platform for receiving concentrated solar radiation. The module includes a heat dissipation housing which supports a silicon cell across an open end of the housing. A heat transfer block physically engages the silicon cell and a metallic sponge and wick is attached to the heat transfer block and depends therefrom into the housing. The housing is partially filled with liquid to facilitate heat removal. The silicon cells are processed by preferential etching to form V grooves which define a plurality of diode elements having generally trapezoidal cross-sections. The elements may be serially interconnected by metallization on the V groove surfaces. The physical configurations of the elements and the use of antireflective coatings on surfaces of the elements result in high efficiency cells.

Claims

1. A method of fabricating a plurality of diode elements in a silicon solar cell comprising the steps of forming an oxide layer on a single crystal silicon substrate,

defining a plurality of spaced oxide strips from said oxide layer through photoresist masking and etching said oxide layer,

applying a preferential etchant to exposed silicon material between said spaced oxide strips;

thereby etching grooves through said silicon substrate and defining a plurality of silicon elements having generally trapezoidal cross-sections,

implanting ions of one conductivity in one surface of each groove including first aligning said substrate with respect to an ion source whereby ions are directed at said one surface of each groove in a direction substantially parallel to the surface of said groove in which ions are not to be implanted,

implanting ions of opposite conductivity in the other surface of each groove including first aligning said substrate with respect to an ion source whereby ions are directed at said other surface of each groove in a direction substantially parallel to said one surface of each groove, and

depositing a metallic interconnection layer in said grooves thereby interconnecting adjacent silicon elements.

2. The method defined by claim 1 and further including the step of bonding one side of said silicon substrate to a glass plate prior to applying said preferential etchant.

3. The method defined in claim 1 or 2 wherein said preferential etchant undercuts said plurality of spaced oxide strips and said step of depositing a metallic interconnection layer in said grooves forms a metallic layer on each of said spaced oxide strips and a metallic layer in each of said grooves with the undercut of said plurality of spaced oxide strips disrupting the continuity of said metallic layers.