Feedback-compensated ramp-type analog to digital converter
First Claim
1. A feedback-corrected ramp-type analog-to-digital converter comprising:
- means for generating a charging current;
a ramp capacitor means responsive to said charging current for accumulating a charge thereon and generating a ramp voltage;
first comparator means responsive to said generated ramp voltage and an analog input signal for outputting a pulse-width comparator output as long as the value of said analog input signal is greater than the value of said generated ramp voltage;
first counter means operatively coupled to the output of said first comparator means and responsive to said pulse-width comparator output signal for counting clock pulses at a predetermined rate during the time duration of said pulse-width output signal so as to accumulate a digital number indicative of the value of said converted analog input signal when said pulse-width comparator output signal ends;
second counter means for storing a zero count when said ramp capacitor means is discharged prior to the initiation of a particular conversion and for counting clock pulses during the generation of said ramp voltage;
decoding means operatively coupled to the outputs of said second counter means for pre-assigning a particular desired level of ramp voltage with a predetermined count number attained by said second counter means and for generating a "count detection" signal in response thereto;
voltage level comparator means for detecting when said generated ramp voltage reaches said particular desired level of ramp voltage assigned to said predetermined count number and generating a "voltage equal" signal in response thereto;
logic means for detecting the time difference between the time of generation of said "count detection" signal and said "voltage equal" signal as a measure of ramp rate error and for generating a signal indicative of ramp rate error in response thereto; and
means operatively coupled to said charging current-generating means and responsive to said signal indicative of ramp rate error for selectively increasing or decreasing the supplying of said charging current to said ramp-generating capacitor means to form a closed control loop for automatically correcting the rate of generation of said ramp voltage.
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Accused Products
Abstract
A method and apparatus for controlling the various functions of an internal combustion engine using a program-controlled microprocessor having a memory preprogrammed with various control laws and associated control schedules. The microprocessor-based control system receives information concerning one or more engine-operating parameters such as manifold absolute pressure, throttle position, engine coolant temperature, air temperature, and engine speed or period and the like. These parameters are sensed or measured and the analog sensor output signals are supplied to input circuits for signal conditioning and conversion into digital words usable by the microprocessor system. The microprocessor system computes a digital word commanding a particular computer-commanded engine control operation and output circuitry responds to particular computer-generated commands and to the computed digital command words for converting them to corresponding pulse-width control signals for controlling such engine operations as fuel-injection ignition timing, proportional and/or on-off EGR control, or the like.
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Citations
18 Claims
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1. A feedback-corrected ramp-type analog-to-digital converter comprising:
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means for generating a charging current; a ramp capacitor means responsive to said charging current for accumulating a charge thereon and generating a ramp voltage; first comparator means responsive to said generated ramp voltage and an analog input signal for outputting a pulse-width comparator output as long as the value of said analog input signal is greater than the value of said generated ramp voltage; first counter means operatively coupled to the output of said first comparator means and responsive to said pulse-width comparator output signal for counting clock pulses at a predetermined rate during the time duration of said pulse-width output signal so as to accumulate a digital number indicative of the value of said converted analog input signal when said pulse-width comparator output signal ends; second counter means for storing a zero count when said ramp capacitor means is discharged prior to the initiation of a particular conversion and for counting clock pulses during the generation of said ramp voltage; decoding means operatively coupled to the outputs of said second counter means for pre-assigning a particular desired level of ramp voltage with a predetermined count number attained by said second counter means and for generating a "count detection" signal in response thereto; voltage level comparator means for detecting when said generated ramp voltage reaches said particular desired level of ramp voltage assigned to said predetermined count number and generating a "voltage equal" signal in response thereto; logic means for detecting the time difference between the time of generation of said "count detection" signal and said "voltage equal" signal as a measure of ramp rate error and for generating a signal indicative of ramp rate error in response thereto; and means operatively coupled to said charging current-generating means and responsive to said signal indicative of ramp rate error for selectively increasing or decreasing the supplying of said charging current to said ramp-generating capacitor means to form a closed control loop for automatically correcting the rate of generation of said ramp voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. In an A/D converter system wherein an analog input signal is compared with a ramp signal to produce a pulse-width signal indicative of the value of said analog input signal and a counter responsive to the pulse-width output from said comparison counts clock pulses to produce a digital count which, at the termination of said pulse-width signal, is indicative of the value of said analog input voltage, an improved ramp signal generation system comprising:
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current source means; a ramp capacitor coupled between said current source means and ground and responsive to charging current from said current source means for generating a ramp signal; reset means for initially discharging said ramp capacitor and establishing a predetermined initial reference voltage from which to begin the generation of said ramp signal at the beginning of each cnversion cycle; counter means; decoder means coupled to the output of said counter means and responsive to one or more counts contained therein for generating count decode signals indicative of said attained counts, and reset means being responsive to one of said count decode signals for initially discharging said ramp capacitor to initialize a conversion cycle; a feedback comparator having first and second inputs and an output, said first input being operatively coupled to receive said generated ramp signal; means operatively coupled to the second input of said feedback comparator for establishing a reference voltage indicative of the desired voltage level said ramp signal should have reached at the time of attainment of a second predetermined one of said counts attained by said counter means if the rate of generation of said ramp signal is correct and for outputting a pulse-width feedback signal at a first state until said generated ramp signal is equal to said established voltage reference and thereafter for outputting a pulse-width feedback signal having a second state; logical gating means operatively coupled to the ouptut of said feedback comparator means for receiving said feedback pulse-width signal, said gating means being responsive to another of said predetermined count decode signals which is indicative of the attainment of said second predetermined one of said counts corresponding to said desired voltage level for generating a feedback correction signal indicative of the ramp rate error; and means responsive to said feedback correction signal indicative of the ramp rate error for selectively controlling the charging of said ramp capacitor means and hence the rate of generation of said ramp signal. - View Dependent Claims (9, 10, 11, 12)
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13. In an internal combustion engine having an intake, an exhaust system, an engine block, a plurality of cylinders disposed in said engine block, a piston mounted for reciprocal movement within each of said plurality of cylinders in response to the combustion of fuel therein, means responsive to a fuel control signal for controlling the quantity of fuel supplied into a selected one or more of said cylinders, means responsive to an ignition control signal for controlling the ignition of said fuel supplied to said selected one or more of said cylinders, sensors operatively associated with said engine for measuring a plurality of engine-operating parameters and generating sensor analog output signals indicative of the measured value thereof, a ramp-type analog-to-digital converter means for converting said sensor analog output signals indicative of said measured engine-operating parameters into digital works indicative thereof, said converter means including a ramp capacitor for generating a ramp voltage, a signal comparator for comparing the value of said ramp voltage with the value of said analog input signal for generating a pulse-width output indicative of the value of said analog input signal, and first counter means for counting clock pulses during the interval of said pulse-width output signal and storing a count at the termination thereof, said count corresponding to said digital word, a microprocessor-based electronic engine control system responsive to a selected one or more of said digital words for generating control commands, and means responsive to a selected one or more of said control commands for outputting said fuel control signal and said ignition control signal, an improved closed-loop feedback system for automatically correcting the rate of generation of said ramp voltage used in said analog-to-digital conversion for improving the accuracy thereof comprising:
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current source means operatively coupled between a source of potential and said ramp capacitor for supplying charging current thereto to generate said ramp voltage; a second counter means for counting clock pulses during said conversion process; means for measuring the difference between the time of attainment of a predetermined count by said second counter means and the time said ramp voltage reaches a desired voltage level corresponding to that value which should have been reached at the time of the attainment of said predetermined count if the ramp voltage rate had been correct and for generating a ramp rate error signal in response thereto; and means responsive to said ramp rate error signal for selectively varying the operation of said current source means to control the supply of charging current to said ramp capacitor so as to correct for said error in the rate of generation of said ramp voltage. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification