Multichannel display device

• US 4,257,043 A
• Filed: 03/22/1978
• Issued: 03/17/1981
• Est. Priority Date: 03/24/1977
• Status: Expired due to Term

• Current Assignee: Tokyo Shibaura Electric Co., Ltd.
• Original Assignee: Tokyo Shibaura Electric Co., Ltd.
• Inventors: Tsuchiko, Masayoshi
• Primary Examiner(s): Trafton, David L.
• Application Number:
  US05/889,009
• Time in Patent Office: 1,091 Days
• Field of Search: 340/324 A, 340/324 AD, 340/721, 340/722, 340/731, 340/747, 324/121 R
• US Class Current: 345/534
• CPC Class Codes: G01R 13/28 Circuits for simultaneous or sequential presentation of more than one variable
• CPC Class Codes: G01R 13/345 for displaying sampled signals by using digital processors by intermediate A.D. and D.A. convertors (control circuits for CRT indicators)

Abstract

Disclosed is a multichannel display device which is so constructed that the waveform of input signal of each channel displayed on the cathode ray tube may be enlarged or reduced in the horizontal sweep direction or the horizontal direction by setting a sampling time interval for sampling the input signal of the channel to store the same in a corresponding one of plural memory units provided for each channel, a reading time for reading a sampled data stored in the corresponding memory, and a horizontal sweeping speed or one-sweep time of a cathode ray tube for displaying the waveform of the input signal in accordance with the sampled data as read, so as to permit these three factors to have an interrelation determined with respect to the channel.

Claims

1. A multiple display device comprising:

means for sampling multichannel input signals;

a memory having a plurality of memory units for storing sampled data received from said sampling means, the number of said memory units being the same as that of the number of channels;

means for writing the sampled data into said memory units at common sampling time intervals;

data readout means for reading out sampled data from said memory units at readout time intervals identical with said common sampling time intervals;

display means for displaying the waveforms of said input signals;

a horizontal sweep signal generator for producing and supplying to said display means a horizontal sweep signal whose frequency is varied in accordance with each respective multichannel signal; and

channel switching means for simultaneously displaying said input signals means.

2. A multichannel display device according to claim 1, wherein said sampling means comprises a multiplexer for transmitting analog sampled data of each respective input signal of each channel;

a first counter for driving said multiplexer by switching the channels;

an AD converter for converting the sampled data into digital data; and

a second counter for supplying write-in signals to each channel into the memory unit at the sampling time intervals synchronous with the operative of said multiplexer.

3. A multichannel display device according to claim 2, wherein said data readout means includes a third counter for supplying readout signals to each memory unit to read out the digital data from each memory unit at the readout time intervals identical with said sampling time intervals.

4. A multichannel display device according to claim 3, said horizontal sweep signal generator further including an oscillator for generating rectangular pulses having a period corresponding to the horizontal sweep velocity specific to the selected channel each time channel switching is effected, and ramp voltage generator means for generating ramp voltage when said oscillator produces no pulses and abruptly lowering the ramp voltage when said oscillator produces said pulses.

5. A multichannel display device according to claim 4, further comprising a control unit including a clock pulse generator and a system controller responsive to said clock pulse generator for driving said first, second and third counters and for controlling the frequency of the pulses generated by said oscillator according to the selected channel.

6. A multichannel display device according to claim 5, wherein said ramp voltage generator means comprises an operational amplifier;

a circuit constituted by a plurality of first capacitors and a changeover switch for connecting one of the first capacitors between the input and output terminals of said amplifier when it selects one of channels, the number of said first capacitors being the same as that of said channels;

a discharge register and gate means connected between the input and output terminals of said amplifier;

a plurality of second capacitors for determining the frequency of the pulses generated by said oscillator, the number of capacitors being the same as that of the channels; and

switch means for selecting one of the second capacitors most suitable for the selected channel.