Ultrasonic transducer fabricated as an integral park of a monolithic integrated circuit

• US 4,262,399 A
• Filed: 11/08/1978
• Issued: 04/21/1981
• Est. Priority Date: 11/08/1978
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Cady, William R.
• Primary Examiner(s): Massie, Jerome W.
• Application Number:
  US05/958,799
• Time in Patent Office: 895 Days
• Field of Search: 156/653, 156/656, 156/657, 156/659.1, 156/662, 29/579, 29/602 A, 29/25.42, 357/26, 357/51, 427/88
• US Class Current: 438/53
• CPC Class Codes: B06B 1/0292 Electrostatic transducers, e.g. electret-type
• CPC Class Codes: H01G 2005/02 having air, gas, or vacuum as the dielectric
• CPC Class Codes: H01G 5/16 using variation of distance between electrodes

Abstract

An array of electrostatic transducers is fabricated on a monolithic integrated circuit chip having provision for detection, amplification, and signal processing of received echoes. The transducer is multilayered with the form of a parallel plate capacitor, and is made by laterally etching an insulating layer through a small hole in the overlying layer to create a void region, then depositing a sealing layer to seal the etch holes. The upper metallic layers cover the transducer array and other monolithic circuitry and are etched to be interconnections for the various components.

Claims

1. A method of fabricating an electrostatic transducer on a monolithic integrated circuit semiconductor substrate comprising the steps of:

depositing at least a first continuous insulating layer and a second continuous layer in that order on said semiconductor substrate,

making a plurality of etch holes in said second layer,

laterally etching said first layer using the apertured second layer as a mask to create void regions which extend from each etch hole laterally beneath the second layer,

depositing a sealing layer on said second layer which extends into said etch holes and seals off each void region to form a transducer structure capable of sensing received ultrasonic energy, at least one of said second layer and sealing layer being made of conductive material, and

further including the initial steps of depositing a continuous relatively thick insulating layer on said semiconductor substrate and etching holes in said thick insulating layer corresponding to the active areas of the transducer structures made by the subsequent processing, whereby inactive area capacitance between the transducer structures is reduced.

2. A method of fabricating an electrostatic transducer as an integral part of a monolithic integrated circuit which includes electronic processing circuitry comprising the steps of;

depositing at least first and second continuous insulating layers and a third continuous conducting layer in that order on a silicon semiconductor substrate,

making a plurality of etch holes in said conducting layer,

laterally etching only said second insulating layer using the apertured conducting layer as a mask to create void regions which extend laterally from each etch hole beneath the conducting layer, and

depositing a continuous sealing layer on said conducting layer which extends through said etch holes and contacts said first insulating layer to seal off each void region and form a transducer structure capable of sensing received ultrasonic energy.

3. The method of claim 2 wherein said first insulating layer is comprised of silicon dioxide and an overlying layer of silicon nitride, said second insulating layer is made of undoped polycrystalline silicon, and said conducting and sealing layers are aluminum.

4. The method of claim 2 or claim 3 further including the initial steps of depositing a continuous relatively thick layer of silicon dioxide on said semiconductor substrate and etching holes in said thick silicon dioxide layer defining the active areas of the transducer structures made by the subsequent processing.

5. A method of fabricating an electrostatic transducer in combination with electronic processing circuitry on a monolithic integrated circuit chip comprising the steps of;

fabricating the monolithic electronic circuitry on selected regions of a semiconductor substrate up to the stage of making contact windows and interconnections to circuit elements, and reserving a portion of the substrate area as a transducer region,

depositing at least first and second insulating layers on the surface within the transducer region boundaries and on at least part of said electronic circuitry,

etching contact windows to selected circuit elements,

depositing a third layer on said second layer and making a pattern of etch holes in said layer within the transducer region boundaries,

laterally etching said second insulating layer using the apertured third layer as a mask to create void regions which extend from each etch hole laterally beneath the third layer,

depositing a conductive sealing layer on at least said third layer which extends through said contact windows and into said etch holes to seal off each void region and form a transducer structure capable of sensing received ultrasonic energy, and

etching at least said sealing layer to provide interconnections for the transducer and monolithic electronic circuitry.

6. The method of claim 5 wherein the step of fabricating monolithic electronic circuitry includes depositing a relatively thick insulating layer on the substrate within the transducer region, and etching holes in said thick insulating layer corresponding to the active areas of the transducer structures made by the subsequent processing, whereby inactive area capacitance between the transducer structures is reduced.

7. A method of fabricating an electrostatic transducer array in combination with electronic processing circuitry on a monolithic integrated circuit chip comprising the steps of;

fabricating the monolithic electronic circuitry on selected regions of a semiconductor substrate up to the stage of etching contact windows to an active circuit element and including incidental to such fabrication the deposition of a relatively thick insulating layer on a reserved transducer region,

etching holes in said thick insulating layer corresponding to the areas of the transducer structures to be made,

depositing other continuous thin insulating layers on the apertured thick insulating layer and on at least part of said electronic circuitry,

etching contact windows through all the thin insulating layers to the active element,

depositing a continuous conducting layer on the uppermost thin insulating layer and through the contact windows connecting to the active element,

making a pattern of etch holes in the conducting layer within the transducer region boundaries,

laterally etching only the uppermost thin insulating layer using the apertured conducting layer as a mask to create void regions which extend laterally from each etch hole beneath the conducting layer,

depositing a continuous conductive sealing layer on said conducting layer which extends through said etch holes and contacts the underlying thin insulating layer to seal off each void region and form a transducer structure capable of sensing received ultrasonic energy, and

etching said conducting and sealing layers to provide interconnections for the transducer array and for the active element and monolithic electronic circuitry.

8. The method of claim 7 wherein said continuous thin insulating layers are made of silicon dioxide, silicon nitride and polycrystalline silicon, and said conducting and sealing layers are aluminum.