Microprocessor based system for the development and emulation of programmable calculator control read only memory software

• US 4,277,827 A
• Filed: 01/02/1979
• Issued: 07/07/1981
• Est. Priority Date: 01/02/1979
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: O'Hagan, Michael, Carlson, George M.
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): Eng, David Y.
• Application Number:
  US06/000,615
• Time in Patent Office: 917 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 364/578, 364/579, 364/580
• US Class Current: 703/24
• CPC Class Codes: G06F 11/261 by simulating additional hardware, e.g. fault simulation
• CPC Class Codes: G06F 11/3648 using additional hardware

Abstract

A microprocessor based system for both creating and emulating control read only memories (CROM) for use in conjunction with programmable calculators and the like. The development system operates as two independent yet integrated systems. The system generates programmable calculator key codes from source code entered via a system computer keyboard, then maps the code into the system'"'"'s read/write random access memory in the proper CROM format, and generates a gate placement tape from data stored in that memory. Additionally, the system emulates a CROM for real time interconnection to the programmable calculator. Thus, actual in calculator testing of the generated key codes is made possible prior to commitment of the code to mask and permanent manufactured CROMS.

Claims

1. A system, used externally in conjunction with a programmable calculator containing an external control read only memory port and a control read only memory for generating instruction and clock signals, for emulating and developing control read only memory of said calculator, comprising:

(A) means for connection to an external control read only memory port of a programmable calculator for receiving said instruction and clock signals,

(B) means for emulating an external control read only memory for said calculator coupled to said means for connection said means for emulating comprising;

(1) interface controller means connectable to said port of said calculator for decoding instruction commands received from said calculator via said port for providing selected data via said port to said calculator for execution therein in response to said instruction commands; and

(2) memory means, coupled to said controller means for providing to said controller means prestored data corresponding to a control read only memory program, in a sequence addressed by said controller means, said controller means including means for decoding said data from said memory means and for transmitting said data to said calculator via said port, whereby said control read only memory of said programmable calculator is being replaced by the memory means.

2. A system as in claim 1 wherein the memory means is a random access read-write memory.

3. A system as in claim 1 wherein the memory means is a non-volatile random access memory.

4. A system as in claim 1 wherein said interface controller means further comprises:

(a) input buffer means, coupled to said means for connection, for converting voltage levels of received instruction and clock signals;

(b) instruction decode means, connected to the input buffer means, for evaluating an incoming instruction signal pattern of said instruction signals and for providing a signal indicative of the evaluated instruction on a status line for the evaluated instruction, each evaluated instruction having a separate status line;

(c) clock timing decode means, coupled to said instruction decode means and to said input buffer means, said clock timing decode means for selectively buffering, decoding, accumulating, and outputting clock cycle and cycle state status signals responsive to said clock signals;

(d) output buffer means coupled to said means for connection for converting voltage levels of received signals; and

(e) program counter means, coupled to said instruction decode means, to said input and output buffer means and to said clock decode timing means, said program counter means including means for selectively storing and means for selectively outputting addresses of current and next data storage words to be accessed, responsive to said status line signals.

5. The system according to claim 4 wherein said program counter means further includes means for functioning as a counter, sequentially incrementing in response to said status line signals, providing for automatic program counter operation.

6. The system according to claim 1, which system further comprises:

(a) input means for providing alphanumeric source code data entry;

(b) a control read only memory software development means coupled to said memory means, and to said interface controller means, said development means for translating said alphanumeric source code data entry into calculator binary code and for formatting said calculator code in said memory means in a pattern corresponding to a control read only memory format,

(c) control means coupled to said development means, sharing said memory means, with said interface controller means, for allowing for relatively fast alternating access of said memory means by said interface controller means and said software development means responsive to a priority request signal, said interface controller means including means for outputting said priority request signal.

7. The system according to claim 6 wherein said software development means further comprises:

a multiconductor interface bus providing common connection points for signals within said software development system, and connected to said interface controller means and to said memory means,

a non-volatile storage memory connected to said interface bus containing a stored binary pattern, a central processing unit connected to said interface bus, said central processing unit for accessing said stored code from said non-volatile memory, for responding to said code stored in said non-volatile memory and effectuating translation of said alphanumeric source code to said binary calculator code and for formatting said calculator code within said memory means in a control read only memory pattern compatible with said interface controller means, said central processing unit halting operation of the software development system and relinquishing control of said interface bus in response to said priority request signal for said data memory means, and

keyboard and video interface means, coupled to said interface bus, providing for connection to a system keyboard and to a video monitor, said keyboard and video interface means buffering data entries of said alphnumeric source code from said keyboard to said interface bus, and therefrom to said central processing unit for analysis and translation, said keyboard and video interface means buffering data from said interface bus from said central processing unit, said non-volatile storage memory, or said memory means, said video interface means for converting said data into video control signals, and for outputting said video control signals to said video monitor for displaying the converted data.

8. The system according to claim 7 wherein the software development system further includes external tape storage interface means coupled to said central processing unit, and providing for connection to an external tape storage medium, providing for external tape storage of said calculator code and for a gate placement code, said external tape being utilized for subsequent software development and mass generation of a control read only memory containing said calculator code as stored in said data memory means.

11. The system as in claim 1 further comprising:

programmable calculator means having said control read only memory port, said port being coupled to said interface controller means, said programmable calculator means including means for executing said selected data received via said port as a program in the same manner as if said data were eminating from a control read only memory coupled to said port.

12. The system as in claim 6 further comprising:

programmable calculator means having said control read only memory port, said port being coupled to said interface controller means, said program calculator means including means for executing said selected data received via said port as a program in the same manner as if said data were eminating from a control read only memory coupled to said port.

13. The system as in claim 12 wherein said means for executing provides for execution of said selected data in a real time mode as said selected data is received, said selected data being received sequentially following said priority request signal.

9. A method of developing and testing control read only memory calculator code patterns for a calculator containing an external control read only memory port and a control read only memory comprising:

inputting alpha-numeric data corresponding to calculator source program, into a data processing system,

translating in said data processing system said calculator source program into calculator object program corresponding to a control program of a calculator read only memory,

storing said calculator object program in a random access read-write memory of the data processing system,

connecting the random access read-write memory to said external control read only memory port of said calculator such that said calculator control read only memory is being replaced by the random access memory,

executing said calculator object code data stored in said read-write memory within a calculator,

testing and correcting said calculator object program executing in said calculator,

translating in said data processing system said corrected calculator object program into a gate placement code for mass generation of control read only memories,

outputting said gate placement code to an external non-volatile storage medium,

creating control read only memory modules containing the calculator object code from said gate placement code,

inserting said control read only memory containing said corrected object program in said calculator for final test and verification.

10. A method of developing a control read only memory for replacing the ROM within a calculator which comprises an external control read only memory port comprising:

inputting alpha-numeric data corresponding to source program into a data processing system,

translating said source program into object program for said calculator,

storing said calculator object program in a memory means of a data processing system,

connecting the random access read-write memory to said external control read only memory port of said calculator such that said calculator control read only memory is being replaced by the random access memory,

executing said calculator object program stored in said memory means within said calculator,

testing and correcting said calculator object program executing in said calculator,

translating said corrected calculator object program into a gate placement code for mass generation of intergrated circuit control read only memories,

outputting said gate placement code to an external non-volatile storage medium,

fabricating control read only memory modules containing said corrected calculator object program from said gate placement code.