Method of fabricating a diode bridge rectifier in monolithic integrated circuit structure utilizing isolation diffusions and metal semiconductor rectifying barrier diode formation

• US 4,281,448 A
• Filed: 04/14/1980
• Issued: 08/04/1981
• Est. Priority Date: 04/14/1980
• Status: Expired due to Term

• Current Assignee: GTE Laboratories Incorporated (Lumen Technologies, Inc.)
• Original Assignee: GTE Laboratories Incorporated (Lumen Technologies, Inc.)
• Inventors: McCarthy, Jeremiah P., Barry, Vincent J.
• Primary Examiner(s): Rutledge, L. Dewayne
• Assistant Examiner(s): Saba, W. G.
• Application Number:
  US06/140,036
• Time in Patent Office: 477 Days
• Field of Search: 29/577 C, 29/577 R, 29/578, 29/590, 148/175, 148/187, 427/84, 357/15, 357/44, 357/45, 357/76
• US Class Current: 438/418
• CPC Class Codes: H01L 21/761 PN junctions
• CPC Class Codes: H01L 21/82 to produce devices, e.g. integrated circuits, each consisting of a plurality of components
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Method of fabricating monolithic integrated circuit structure incorporating a full-wave diode bridge rectifier of four Schottky diodes. A body of silicon is produced by growing an epitaxial layer of N-type silicon on a P-type substrate. P-type imparting material is diffused into the layer to form isolating barriers delineating first and second N-type zones separated from each other by intervening P-type material and third and fourth N-type zones which are contiguous. A mixture of titanium and tungsten is deposited on portions of the zones and heated to form a mixed silicide. Schottky rectifying barriers are produced at the interfaces of the mixed silicide and N-type zones. Conductive members are formed; a first conductive member is connected to the N-type material of the first zone and the silicide of the third zone, a second conductive member is connected to the N-type material of the second zone and the silicide of the fourth zone, a third conductive member is connected in common to the silicide of the first and second zones, and a fourth conductive member is connected to the N-type material of the third and fourth zones. An AC voltage applied across the first and second conductive members produces a DC voltage across the third and fourth conductive members.

Claims

1. The method of fabricating monolithic integrated circuit structure incorporating a metal-semiconductor rectifying barrier diode bridge comprising:

providing a substrate of semiconductor material of one conductivity type;

growing an epitaxial layer of semiconductor material of the opposite conductivity type on a surface of the substrate to produce a body of semiconductor material;

diffusing conductivity type imparting material of the one conductivity type into portions of said layer extending to said substrate to form isolating barriers delineating a first sector of the opposite conductivity type electrically isolated from the remainder of the body and having a first and a second zone of the opposite conductivity type separated from each other by an intervening barrier of semiconductor material of the one conductivity type and delineating a second sector of the opposite conductivity type electrically isolated from the remainder of the body and having a third and a fourth zone of the opposite conductivity type;

placing metal-semiconductor rectifying barrier forming metal on portions of said first zone and said second zone of said one sector, on a portion of said third zone, and on a portion of said fourth zone of said second sector and forming metal-semiconductor rectifying barriers between the metal and the semiconductor material; and

forming a first electrical connection in ohmic contact with the first zone of semiconductor material and connected to the metal on the third zone, a second electrical connection in ohmic contact with the second zone of semiconductor material and connected to the metal on the fourth zone, a third electrical connection connected to the metal on the first and second zones, and a fourth electrical connection in ohmic contact with the third and fourth zones of semiconductor material.

2. The method of fabricating monolithic integrated circuit structure in accordance with claim 1 including:

placing a single continuous layer of metal-semiconductor rectifying barrier forming metal on said portions of the first and second zones.

3. The method of fabricating monolithic integrated circuit structure in accordance with claim 2 wherein:

said third and fourth zones of semiconductor material of the opposite conductivity type are contiguous, forming a section of the opposite conductivity type;

and including

placing separate layers of metal-semiconductor rectifying barrier forming metal on said portions of the third and fourth zones; and

forming said fourth electrical connection in ohmic contact with said section of the opposite conductivity type.

4. The method of fabricating monolithic integrated circuit structure in accordance with claim 3 wherein:

the metal-semiconductor rectifying barriers formed between rectifying barrier forming metal and semiconductor material are Schottky barrier diodes.

5. The method of fabricating monolithic integrated circuit structure in accordance with claim 4 wherein:

the semiconductor material is silicon; and

placing metal-semiconductor rectifying barrier forming metal and forming metal-semiconductor rectifying barriers includes

depositing a mixture of titanium and tungsten on said portions of the first and second zones, on said portion of the third zone and on said portion of the fourth zone, and

heating to form a mixed silicide of titanium and tungsten which provides a metal-semiconductor rectifying barrier with the adjacent silicon at each of said portions.

6. The method of fabricating monolithic integrated circuit structure in accordance with claim 5 wherein

the deposited mixture of titanium and tungsten contains about 5% titanium by weight.

7. The method of fabricating monolithic integrated circuit structure in accordance with claim 5 wherein

the one conductivity type is P-type;

and

the opposite conductivity type is N-type.

8. The method of fabricating monolithic integrated circuit structure incorporating a metal-semiconductor rectifying barrier diode bridge comprising

providing a substrate of semiconductor material of one conductivity type having a flat planar surface;

growing an epitaxial layer of semiconductor material of the opposite conductivity type on said surface of the substrate, said layer having a flat planar surface parallel to the interface of the layer and the substrate, said substrate and layer forming a body of semiconductor material;

diffusing conductivity type imparting material of the one conductivity type into selected portions of said layer from the surface to said substrate to form isolating barriers of semiconductor material of the one conductivity type delineating a first sector of the opposite conductivity type electrically isolated from the remainder of the body and having a first and a second zone of the opposite conductivity type separated from each other by an intervening barrier of semiconductor material of the one conductivity type and delineating a second sector of the opposite conductivity type electrically isolated from the remainder of the body and having a third and a fourth zone of the opposite conductivity type;

forming an adherent nonconductive coating on the surface of the layer;

placing metal-semiconductor rectifying barrier forming metal on portions of the surface of said first zone and said second zone of said one sector, on a portion of the surface of said third zone, and on a portion of the surface of said fourth zone of said second sector at openings in said coating and forming metal-semiconductor rectifying barriers between the metal and the semiconductor material; and

placing conductive material on predetermined areas of said coating to form conductive buses including a first conductive bus in ohmic contact with the first zone of semiconductor material at an opening in the coating and connected to the metal on the surface of the third zone, a second conductive bus in ohmic contact with the second zone of semiconductor material at an opening in the coating and connected to the metal on the surface of the fourth zone, a third conductive bus connected to the metal on the surfaces of the first and second zones, and a fourth conductive bus in ohmic contact with the third zone of semiconductor material at an opening in the coating and in ohmic contact with the fourth zone of semiconductor material at an opening in the coating.

9. The method of fabricating monolithic integrated circuit structure in accordance with claim 8 including

forming a single continuous opening in said coating exposing the portions of the surfaces of the first and second zones of the one sector;

and

placing a single continuous layer of metal-semiconductor rectifying barrier forming metal on said portions of the surface of the first and second zones exposed by the opening.

10. The method of fabricating monolithic integrated circuit structure in accordance with claim 9 wherein

said third and fourth zones of semiconductor material of the opposite conductivity type are contiguous, forming a section of the opposite conductivity type;

and including

forming separate openings in said coating exposing the portion of the surface of the third zone and the portion of the surface of the fourth zone; and

placing separate layers of metal-semiconductor rectifying barrier forming metal on said portions of the surfaces of the third and fourth zones exposed by the openings.

11. The method of fabricating monolithic integrated circuit structure in accordance with claim 10 including prior to placing metal-semiconductor rectifying barrier forming metal and forming metal-semiconductor rectifying barriers the steps of

diffusing conductivity type imparting material of the one conductivity type into selected portions of said epitaxial layer at the surface thereof to form

a first ring of the one conductivity type in the first zone encircling said portion of the surface of the first zone,

a second ring of the one conductivity type in the second zone encircling said portion of the surface of the second zone,

a third ring of the one conductivity type in the third zone encircling said portion of the surface of the third zone, and

a fourth ring of the one conductivity type in the fourth zone encircling said portion of the surface of the fourth zone;

and

forming first, second, and third openings in said coating, said first opening exposing said portions of the surface of the first and second zones and the portions of the first and second rings at the interface of the rings and the first and second zones, said second opening exposing said portion of the surface of the third zone and the portion of the third ring at the interface of the ring and the third zone, and said third opening exposing said portion of the surface of the fourth zone and the portion of the fourth ring at the interface of the ring and the fourth zone;

and wherein placing metal-semiconductor rectifying barrier forming metal includes

placing metal-semiconductor rectifying barrier forming metal on the surface areas exposed by the first, second, and third openings.

12. The method of fabricating monolithic integrated circuit structure in accordance with claim 11 wherein

the metal-semiconductor rectifying barriers formed between rectifying barrier forming metal and semiconductor material are Schottky barrier diodes.

13. The method of fabricating monolithic integrated circuit structure in accordance with claim 12 including prior to growing the epitaxial layer the step of

diffusing conductivity type imparting material of the opposite conductivity type into predetermined first, second, and third portions of the substrate to form regions of the opposite conductivity type of low resistivity, which upon subsequent growing of the epitaxial layer and diffusing of conductivity type imparting material of the one conductivity type to form isolating barriers become buried regions of the zones of the opposite conductivity type, said first portion becoming a buried region of the first zone, said second portion becoming a buried region of the second zone, and said third portion becoming a buried region of said third and fourth zones.

14. The method of fabricating monolithic integrated circuit structure in accordance with claim 13 including the step of

diffusing conductivity type imparting material of the opposite conductivity type into selected portions of the first and second sectors to form contact regions of the opposite conductivity type of low resistivity extending from the surface to the buried regions of the opposite conductivity type.

15. The method of fabricating monolithic integrated circuit structure in accordance with claim 14 wherein

the interface of the contiguous third and fourth zones of the opposite conductivity type includes a portion of a contact region of the opposite conductivity type of low resistivity.

16. The method of fabricating monolithic integrated circuit structure in accordance with claim 12 wherein

the semiconductor material is silicon;

and

placing metal-semiconductor rectifying barrier forming metal and forming metal-semiconductor rectifying barriers includes

depositing a mixture of titanium and tungsten on said portions of the surface of the first and second zones, on said portion of the surface of the third zone, and on said portion of the surface of the fourth zone, and

heating to form a mixed silicide of titanium and tungsten which provides a metal-semiconductor rectifying barrier with the adjacent silicon at each of said portions.

17. The method of fabricating monolithic integrated circuit structure in accordance with claim 16 wherein

the deposited mixture of titanium and tungsten contains about 5% titanium by weight.

18. The method of fabricating monolithic integrated circuit structure in accordance with claim 16 wherein

the one conductivity type is P-type;

and

the opposite conductivity type is N-type.