Waveform acquisition circuit

• US 4,283,713 A
• Filed: 01/15/1979
• Issued: 08/11/1981
• Est. Priority Date: 01/15/1979
• Status: Expired due to Term

• Current Assignee: Tektronix Incorporated (Fortive Corp.)
• Original Assignee: Tektronix Incorporated (Fortive Corp.)
• Inventors: Philipp, Harald
• Primary Examiner(s): Sloyan, Thomas J.
• Application Number:
  US06/003,141
• Time in Patent Office: 939 Days
• Field of Search: 324/77 A, 324/77 B, 324/77 G, 324/83 R, 324/121 R, 324/102, 324/131, 315/367, 315/377, 340/347 M, 340/347 AD, 364/734, 364/111, 364/112, 328/151, 328/129, 328/130
• US Class Current: 341/142
• CPC Class Codes: G01R 13/34 Circuits for representing a single waveform by sampling, e.g. for very high frequencies

Abstract

A waveform acquisition circuit for both real-time and equivalent-time acquisition modes with a smooth transition between modes. The circuit includes a control circuit which causes an analog-to-digital converter to take samples of an analog waveform in precise time relationship with preselected data points along the time axis of the waveform. The data points may be preselected in accordance with a variable increment.

Claims

1. A waveform acquisition circuit having a variable acquisition rate, comprising:

control circuit means including an increment register, an adder circuit, and a latch for providing a digitally selected and incremented digital control signal in accordance with a selectable incremental value, wherein said increment register stores said selectable incremental value, said adder circuit iteratively adds said incremental value to said digital control signal, and said latch holds said digital control signal until updated in response to convert pulses received at a clock input of said latch;

means for converting said digital control signal to discrete voltage levels;

means for comparing said discrete voltage levels with a sweep sawtooth voltage and generating said convert pulses thereby, said sweep sawtooth corresponding to the time-base axis of said analog waveform;

an analog-to-digital converter for converting instantaneous values of said analog waveform to digital waveform data in response to said convert pulses; and

an addressable waveform memory for storing said digital waveform data, wherein said digital control signal provides addresses for said memory.

2. A waveform acquisition circuit in accordance with claim 1 wherein said control circuit means includes a counter circuit for counting said convert pulses and producing a stop signal at the end of an acquisition cycle.

3. A waveform acquisition circuit in accordance with claim 1 wherein said means for converting said digital control signal to discrete voltage levels comprises a digital-to-analog converter.

4. A waveform acquisition circuit having selectably variable acquisition rates, comprising:

a time base circuit for generating sawtooth signals having a fixed amplitude and a selectably variable width;

a discrete voltage generator for generating a plurality of equally-spaced discrete voltage levels over the fixed amplitude range of said sawtooth signals;

a convert pulse generator coupled to said time base circuit and said discrete voltage generator for generating convert pulses responsive to coincidence of said sawtooth signals and said discrete voltage levels;

an analog-to-digital converter for converting amplitude values of an analog waveform to digital data in response to said convert pulses; and

control circuit means for providing digital control signals in accordance with a selectably variable increment to determine the selection of said discrete voltage levels,

said control circuit means including a register for storing a digital number corresponding to said selectably variable increment, and means for iteratively adding said number to thereby produce said control signal, said adding means operating in response to convert pulses from said convert pulse generator.

5. A waveform acquisition circuit in accordance with claim 4 further comprising a counter circuit for counting said convert pulses, said counter circuit providing a signal upon completion of acquisition of a waveform.

6. A waveform acquisition circuit in accordance with claim 4 further comprising external control means for providing start, stop, and increment values for operation of said waveform acquisition circuit.

7. A waveform acquisition circuit in accordance with claim 4 further comprising a waveform memory for storing said digital data, wherein said control signal also provides addresses for said memory.