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Cyclic redundancy data check encoding method and apparatus

  • US 4,283,787 A
  • Filed: 08/06/1979
  • Issued: 08/11/1981
  • Est. Priority Date: 11/06/1978
  • Status: Expired due to Term
First Claim
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1. Cyclic redundancy check data encoding apparatus comprisinga multi-word memory for storing a block of data,input means for entering a block of data into the memory, addressing means operative to provide an address designating a selected part of the stored block in the memory,an encoder,means for reading words from the memory to the encoder for encoding the words preceding the said selected part designated by the addressing means, the encoder including a register and being constructed to provide a first check word in the register of the encoder,a complementary encoder,means for reading words from the memory to the complementary encoder for encoding, in reverse order, the words succeeding the said selected part designated by the addressing means, the complementary encoder including a register and being constructed to provide a second check word in the register of the complementary encoder,encoding logic responsive to the first and second check words in the registers to generate a third check word, and means responsive to the encoding logic and the addressing means for entering the third check word in the memory to occupy the selected part of the block of data designated by the addressing means.

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