Encoding and decoding of digital recordings

• US 4,297,729 A
• Filed: 11/20/1978
• Issued: 10/27/1981
• Est. Priority Date: 11/24/1977
• Status: Expired due to Term

• Current Assignee: Thorn EMI Patents Limited
• Original Assignee: EMI Ltd (Universal Music Group NV)
• Inventors: Steynor, James H., Hayes, Frederick
• Primary Examiner(s): Canney, Vincent P.
• Application Number:
  US05/961,933
• Time in Patent Office: 1,072 Days
• Field of Search: 360/40, 360/41, 360/47, 360/51, 360/43, 360/44
• US Class Current: 360/40
• CPC Class Codes: G11B 20/1419 to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Abstract

In television games programs may be stored on tape, disc or similar to change a basic games unit to different games or other entertainment or instruction. The data is transferred from the recording medium to a processor and clocked in at a suitable rate. The invention provides generation of clock pulses using two counters. The arrangement generates clock pulses at a predetermined position of data 1'"'"'s but for 0'"'"'s it generates clock pulses a predetermined interval after the preceding pulse. An arrangement is provided recording staggered data on two tracks of a tape to counter drop outs and a watermark code is provided to guard against use of unauthorized programs.

Claims

1. An arrangement for generating controlled clock pulses synchronized to a signal comprising a sequence of `1`s, each indicated by the presence of a signal pulse and `0`s each indicated by the absence of a signal pulse, so that in a sequence of consecutive `0`s no signal pulses are present, the arrangement including a first counter receiving the said signal and arranged to count for a first predetermined period from a predetermined point in relation to each `1` of said signal and to provide a controlled clock pulse synchronized to said signal at the termination of the first period, a second counter arranged to count for a second and longer predetermined period from a preceding controlled clock pulse or until reset prior to the termination of said period and, if not reset, to provide at the termination of said second period a further controlled clock pulse and means for resetting the second counter on reception of a further `1` at the first counter.

2. An arrangement according to claim 1 including a generator of master clock pulses, the first and second predetermined periods being determined by respective predetermined counts of the master clock pulses.

3. An arrangement according to claim 2 in which the master clock pulses are generated at a rate which is a multiple of the expected bit rate of said signal.

4. An arrangement according to claim 3 in which the master clock pulse rate is sixteen times the expected bit rate of said signal.

5. An arrangement according to claim 1 in which the controlled clock pulses provided in response to `1`s'"'"' of said signal are arranged to have trailing edges coinciding with the trailing edge of the respective `1`.

6. An arrangement according to claim 1 in which the said predetermined point is the leading edge of said `1`.

7. An arrangement according to claim 1 in which the said predetermined point is the cross-over of the differentiated leading edge of said `1`.

8. An arrangement according to claim 1 in which the second counter is reset by the first counter on receipt of a `1` thereby.

9. An arrangement according to claim 1 in which the signal is provided as data coded by a biassed discrete code in which `1`s'"'"' and `0`s'"'"' representing data are separated by further `0`s'"'"'.

10. A system for replaying recorded data and operating in the said data in response to controlled clock pulses, including an arrangement according to any one of claims 1-9 arranged to generate the controlled clock pulses.

11. A television game system including a replay system according to claim 10.