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Encoding and decoding of digital recordings

  • US 4,297,729 A
  • Filed: 11/20/1978
  • Issued: 10/27/1981
  • Est. Priority Date: 11/24/1977
  • Status: Expired due to Term
First Claim
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1. An arrangement for generating controlled clock pulses synchronized to a signal comprising a sequence of `1`s, each indicated by the presence of a signal pulse and `0`s each indicated by the absence of a signal pulse, so that in a sequence of consecutive `0`s no signal pulses are present, the arrangement including a first counter receiving the said signal and arranged to count for a first predetermined period from a predetermined point in relation to each `1` of said signal and to provide a controlled clock pulse synchronized to said signal at the termination of the first period, a second counter arranged to count for a second and longer predetermined period from a preceding controlled clock pulse or until reset prior to the termination of said period and, if not reset, to provide at the termination of said second period a further controlled clock pulse and means for resetting the second counter on reception of a further `1` at the first counter.

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