Synchronization circuit for video clock oscillators
First Claim
1. A synchronization circuit for video clock generators, in order to obtain a line synchronization simultaneous with a complete image synchronization, comprising:
- a follow-up control having an output and delivering a clock frequency signal;
said follow-up control having a reference input and a comparison input;
a line pulse separation circuit having an output delivering an external horizontal pulse signal;
said follow-up control having said reference input connected with said output of the line pulse-separation circuit which delivers said external horizontal pulse signal;
an external complete image-characteristic pulse-separation circuit having an input and an output;
the reference input of the follow-up control being connected with the input of the external complete image-characteristic pulse-separation circuit;
both of the separation circuits being impinged at their input sides with a mixed pulse signal;
a comparator having a first input and a second input and delivering an output signal;
the external complete image-characteristic pulse-separation circuit being connected at its output with the first input of the comparator;
an internal complete image-characteristic pulse-separation circuit having a first input and a second input and delivering an output signal;
the second input of the comparator receiving the output signal of the internal complete image-characteristic pulse-separation circuit;
a regulation pulse-switch means having a first input and a second input;
the output signal of the comparator being infed to the first input of the regulation pulse-switch means;
said regulation pulse-switch means having an output;
a video clock generator having a clock input;
the output of the regulation pulse-switch means being connected with the clock input of said video clock generator;
said video clock generator having respective outputs delivering respectively an internal mixed pulse signal and an internal horizontal pulse signal;
said internal horizontal pulse signal being infed to the comparison input of the follow-up control and the first input of the internal complete image-characteristic pulse-separation circuit;
said internal complete image-characteristic pulse-separation circuit receiving at its second input the internal mixed pulse signal; and
said follow-up control having its output connected with the second input of the regulation pulse-switch means.
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Abstract
A synchronization circuit for video clock generators, wherein in order to obtain a line synchronization simultaneous with a complete image synchronization, there is provided a follow-up control which delivers a clock frequency signal. The follow-up control has its reference input connected with the output of a line pulse-separation circuit, delivering an external horizontal pulse signal, and is further connected with the input of an external complete image characteristic or marker pulse-separation circuit. Both of the separation circuits have infed at their input side a mixed pulse signal. The external complete image-characteristic pulse-separation circuit is connected at its output side with the first input of a comparator, the second input of which has infed thereto the output signal of an internal complete image characteristic pulse-separation circuit. The output signal of the comparator is infed to the first input of a regulation pulse-switch means, whose output is connected with the clock input of a clock generator, delivering to a respective output an internal mixed pulse signal and an internal horizontal pulse signal. The latter is delivered to the comparator input of the follow-up control and the first input of the internal complete image-characteristic pulse-separation circuit, the second input of which receives the internal mixed pulse signal. The output of the follow-up control is connected with the second input of the regulation pulse switch means.
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Citations
10 Claims
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1. A synchronization circuit for video clock generators, in order to obtain a line synchronization simultaneous with a complete image synchronization, comprising:
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a follow-up control having an output and delivering a clock frequency signal; said follow-up control having a reference input and a comparison input; a line pulse separation circuit having an output delivering an external horizontal pulse signal; said follow-up control having said reference input connected with said output of the line pulse-separation circuit which delivers said external horizontal pulse signal; an external complete image-characteristic pulse-separation circuit having an input and an output; the reference input of the follow-up control being connected with the input of the external complete image-characteristic pulse-separation circuit; both of the separation circuits being impinged at their input sides with a mixed pulse signal; a comparator having a first input and a second input and delivering an output signal; the external complete image-characteristic pulse-separation circuit being connected at its output with the first input of the comparator; an internal complete image-characteristic pulse-separation circuit having a first input and a second input and delivering an output signal; the second input of the comparator receiving the output signal of the internal complete image-characteristic pulse-separation circuit; a regulation pulse-switch means having a first input and a second input; the output signal of the comparator being infed to the first input of the regulation pulse-switch means; said regulation pulse-switch means having an output; a video clock generator having a clock input; the output of the regulation pulse-switch means being connected with the clock input of said video clock generator; said video clock generator having respective outputs delivering respectively an internal mixed pulse signal and an internal horizontal pulse signal; said internal horizontal pulse signal being infed to the comparison input of the follow-up control and the first input of the internal complete image-characteristic pulse-separation circuit; said internal complete image-characteristic pulse-separation circuit receiving at its second input the internal mixed pulse signal; and said follow-up control having its output connected with the second input of the regulation pulse-switch means. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification