Communication system and method having wide dynamic range digital gain control

• US 4,301,445 A
• Filed: 12/10/1979
• Issued: 11/17/1981
• Est. Priority Date: 12/10/1979
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Robinson, Paul B.
• Primary Examiner(s): YUSKO, DONALD
• Application Number:
  US06/101,450
• Time in Patent Office: 708 Days
• Field of Search: 375/98, 375/14, 375/16, 375/11, 340/152 T, 364/574, 455/200, 455/245, 455/249, 330/284
• US Class Current: 340/10.41
• CPC Class Codes: H03G 3/3036 in high-frequency amplifiers or in frequency-changers H03G3/3052, H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H03G 3/3052 in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H04L 27/08 Amplitude regulation arrangements

Abstract

An automatic gain control system and method, utilizing a digital logic attenuator and control in a communication receiver, operates linearly over a wide dynamic range in the amplitude of input signals applied to the receiver to eliminate distortion and frequency intermodulation products inherent in single channel and multi-channel frequency multiplex communication systems.

Claims

1. An automatic gain control system for linearly controlling the gain of a receiver having an amplifier for receiving input signals of large varying magnitude applied to the receiver, comprising:

(a) a source of clock signals;

(b) a counter having an input for counting pulses and responsive thereto to provide binary output signals representative of counter output states;

(c) a logic attenuator having an input for receiving said input signals and an output for coupling output signals therefrom to the amplifier of said receiver, said logic attenuator being coupled to said counter and responsive to the binary output signals therefrom, whereby the amplitude of the output signals coupled to the amplifier are attenuated in accordance with the output states of said counter;

(d) a threshold detector including a switchable integrator, said switchable integrator receiving said clock signals and the output signals from said logic attenuator and responsive thereto for effecting the generation of an output count control signal from said threshold detector, said output count control signal being generated in synchronization with said clock signals and occurring only when the amplitude of the output signals from said logic attenuator are outside a predetermined reference level as detected by said threshold detector; and

(e) means responsive to said output count control signal and said clock signals for providing said pulses to said counter to effect a change in the output states thereof to control said logic attenuator to maintain the amplitude of the output signals applied to the amplifier from said logic attenuator substantially constant, to thus linearly control the gain of the receiver.

2. The automatic gain control system in accordance with claim 1, wherein said logic attenuator comprises a voltage divider network including switching means coupled to receive the binary output signals from said counter, whereby the input signals applied to said logic attentuator are attenuated in amplitude at the output thereof by a voltage drop across the voltage divider network according to the output states of said counter.

3. The automatic gain control system in accordance with claim 1, wherein said threshold detector further includes a source of reference potential including means for providing said predetermined reference level and comparator means coupled to said switchable integrator and to said means for providing said predetermined reference level for generating said output count control signal when there is a non-comparison in the amplitudes of the output signals from said logic attentuator and the predetermined reference level.

4. The automatic gain control system in accordance with claim 1, wherein said means responsive to said output count control signal and said clock signals comprises a logic element which is enabled to provide said pulses to said counter upon the coincident occurrence of said output count control signal and said clock signals.

5. An automatic gain control system comprising:

(a) a transponder for generating output signals in response to an interrogation signal;

(b) a receiver in communication with said transponder and receiving therefrom said output signals, said receiver comprising,

(1) control and timing means for providing said interrogation signal to said transponder to effect the generation of the output signals therefrom, while further providing clock signals and first and second control signals for said receiver prior to receipt of the output signals from said transponder by said receiver,

(2) a counter responsive to said first control signal from said control and timing means for presetting said counter to a prescribed count, said counter further having an input for counting pulses and responsive thereto to provide binary output signals representative of counter output states,

(3) an amplifier

(4) a logic attenuator having an input for receiving the output signals from said transponder and an output for coupling the output signals to said amplifier, said logic attenuator being coupled to said counter and responsive to the binary output signals therefrom whereby the amplitude of the output signals coupled to said amplifier are attenuated by said logic attenuator in accordance with the output states of said counter,

(5) a threshold detector including amplitude detector means coupled to the output of said logic attenuator and having switch means responsive to the clock signals from said control and timing means for periodically coupling the output signals from said logic attenuator to said threshold detector to periodically effect the generation of an output count control signal from said threshold detector when the amplitude of the output signals from said logic attenuator exceed a predetermined reference level as detected by said threshold detector, and

(6) means responsive to said output count control signal from said threshold detector and to said clock signals and to the second control signal from said control and timing means for providing said pulses to the input of said counter to effect a change in the output states thereof to control said logic attenuator to maintain the amplitude of the signals applied to said amplifier substantially constant to linearly control the gain of said receiver.

6. The automatic gain control system in accordance with claim 5, wherein said logic attenuator comprises a voltage divider network including switching means coupled to receive the binary output signals from said counter, whereby the output signals applied to said logic attenuator from said transponder are attenuated in amplitude at the output of said logic attenuator by a voltage drop across the voltage divider network according to the output states of said counter.

7. The automatic gain control system in accordance with claim 5, wherein said threshold detector further comprises a source of reference potential including means for providing said predetermined reference level, and comparator means coupled to said amplitude detector means and to said means for providing said predetermined reference level, for generating said output count control signal when there is a non-comparison in the amplitudes of the predetermined reference level and the output signals coupled to said comparator means from said logic attenuator by said amplitude detector means.

8. The automatic gain control system in accordance with claim 5, wherein said means responsive to said output count control signal, said clock signals and said second control signal comprises a logic element which is enabled to provide said pulses to said counter upon coincidence of those signals applied to said logic element.

9. An automatic gain control system for substantially eliminating intermodulation frequency products from signals transmitted by the system comprising:

(a) a plurality of transponders, each simultaneously generating, in response to an interrogation signal, an output signal of a different frequency of which the magnitude of at least two of the output signals is greater than the magnitude of the other output signals;

(b) a receiver comprising,

(1) a plurality of amplifiers, each being inherently non-linearly responsive to signals of large varying magnitude, and each tuned to a separate frequency for receiving an output signal at its tuned frequency from a transponder transmitting at the tuned frequency,

(2) control and timing means for providing said interrogation signal to said plurality of transponders to effect the generation of the output signals therefrom, while further providing clock signals and first and second control signals for said receiver prior to receipt of the output signals from said plurality of transponders by said receiver,

(3) a counter responsive to said first control signal from said control and timing means for presetting said counter to a prescribed count, said counter further having an input for counting pulses and responsive thereto to provide binary output signals representative of counter output states,

(4) a logic attenuator having an input for receiving the output signals from said plurality of transponders and an output for coupling the output signals to said plurality of amplifiers, said logic attenuator comprising a voltage divider network, including switching means connected between the input and output of said logic attenuator and coupled to receive the binary output signals from said counter, whereby the output signals from said plurality of transponders applied to said logic attenuator are attenuated in amplitude at the output thereof by a voltage drop across the voltage divider network according to the output states of said counter controlling the switching means of said logic attenuator,

(5) a threshold detector including, a source of reference potential for providing a voltage of a predetermined reference level, a comparator means connected to said reference potential and having an input and an output, an amplitude detector coupled between the output of said logic attenuator and the input of said comparator means, said amplitude detector including signal integrator and switch means responsive to the clock signals from said control and timing means for periodically integrating the output signals from said logic attenuator and providing integrated signals proportional in amplitude to the output signals from said logic attenuator, to the input of said comparator means to periodically effect the generation of an output count control signal from the output of said comparator means when the amplitude of the integrated signals exceed the predetermined reference level, and

(6) means coupled to the output of said comparator means and responsive to the output count control signal therefrom and to the clock signals and to the second control signal from said control.

10. A method of linearly controlling the gain of a receiver in a data communication system comprising the steps of:

(a) applying a data signal of large varying magnitude to a digital logic attenuator in said receiver;

(b) applying the data signal from an output of said digital logic attenuator to a switchable integrator;

(c) switching said switchable integrator, whereby the integrator is charged and discharged to periodically develop a voltage signal proportional in magnitude to the amplitude of the data signal from the output of said digital logic attenuator;

(d) comparing the magnitude of the voltage signal from the integrator with a voltage reference of a predetermined value;

(e) generating a control signal when there is a non-comparison in the magnitudes of the compared voltage signal and the voltage reference;

(f) continuously applying binary state signals to said digital logic attenuator; and

(g) changing the states of said binary state signals, during the presence of said control signal and at a time no later than the discharging of the integrator, to effect a change in the amount of attenuation said digital logic attenuator presents to the data signal applied thereto, to thereby maintain the magnitude of the data signal at the output of the logic attenuator substantially constant, and thus linearly control the gain of said receiver.