Method and apparatus for testing electronic devices

• US 4,307,342 A
• Filed: 07/16/1979
• Issued: 12/22/1981
• Est. Priority Date: 07/16/1979
• Status: Expired due to Term

• Current Assignee: AT&T Technologies Inc (Nokia Corporation)
• Original Assignee: Western Electric Co., Inc. (Nokia Corporation)
• Inventors: Peterson, Karl E.
• Primary Examiner(s): Karlsen, Ernest F.
• Application Number:
  US06/058,035
• Time in Patent Office: 890 Days
• Field of Search: 324/158 D, 324/158 T, 324/158 R, 324/110, 330/207 P
• US Class Current: 324/537
• CPC Class Codes: G01R 31/1236 of surge arresters monitoring overvoltage diverters or arresters H02H3/048
• CPC Class Codes: G01R 31/34 Testing dynamo-electric machines

Abstract

A surge protector is tested by injecting a current spike with an exponentially decaying waveshape (12) through the surge protector. The current is generated by connecting a voltage source (16) to the surge protector and controlling the current through the surge protector by a Darlington array amplifier (20) connected between the surge protector and ground. The Darlington array amplifier (20) is in turn controlled by first generating a reference pulse having a voltage waveform corresponding to the desired current waveform and comparing this reference voltage with a voltage feedback from the Darlington array amplifier (20) to in turn generate an error voltage which is coupled into the amplifier (20). Additionally, differential amplifier circuits (44 and 46) monitor the voltage impressed on the amplifier (20) and reduce the input voltage to the amplifier (20) significantly if the voltage impressed on the amplifier (20) is greater than a predetermined fraction of the voltage source (16).

Claims

1. Apparatus for testing electronic devices comprising:

means for receiving a reference pulse with a predetermined shape and duration;

comparison means for comparing said reference pulse to at least a first feedback signal and for generating an error voltage in response to said comparison;

amplifier means responsive to said error voltage for controlling the current flowing through a device under test, and for generating said first feedback signal as an indication of the amount of current flowing through the device under test;

means for monitoring the voltage across the device during at least a portion of the duration of said reference pulse; and

means for protecting said amplifier means which comprises means for determining the voltage to said amplifier means and for providing a second feedback signal to said comparison means for decreasing said error voltage when the voltage applied to said amplifier means is above a limit.

2. Testing apparatus as set forth in claim 1 wherein said amplifier means is a Darlington array.

3. Testing apparatus as set forth in claim 1 including means for supplying the current flowing through the device and wherein said limit is a portion of a voltage produced by said means for supplying the current flowing through the device.

4. Testing apparatus as set forth in claim 1 wherein said reference means and said voltage monitoring means are adapted to be controlled by a microprocessor.

5. Testing apparatus as set forth in claim 1 wherein said testing apparatus is adapted for testing a surge protector and further including means for providing the reference pulse of a predetermined shape and duration in the form of a pulse having an initially relatively fast risetime to a predetermined amplitude followed by an exponential decay down to a reference potential.

8. Testing apparatus as set forth in claim 1 further including means for supplying the current flowing through the device.

6. A method of testing an electronic device comprising the steps of:

generating a pulse of predetermined shape and duration;

comparing said pulse with at least a first feedback signal;

generating an error voltage in response to said comparison;

sinking current passing through a device at a rate controlled by said error voltage;

generating said first feedback signal as an indication of the current magnitude flowing through the device;

measuring the voltage across the device at a predetermined time after the beginning of said pulse;

determining whether the voltage across the device is above or below a predetermined limit;

generating a second feedback signal to said comparator for indicating whether said predetermined limit has been exceeded; and

decreasing said error voltage appreciably in said comparator when said second feedback signal indicates that the voltage across the device is below the predetermined limit.

7. A method of testing a surge protector comprising the steps of:

(a) generating a voltage pulse having an initial negative peak voltage followed by an exponentially decaying waveform;

(b) summing said inverted voltage pulse with a feedback voltage to form a first summed voltage;

(c) inverting said summed voltage to form an error voltage;

(d) coupling said error voltage to the input of a Darlington array amplifier to sink current from a voltage source through a surge protector;

(e) transforming the magnitude of current flowing through said surge protector to a proportional magnitude of voltage to produce said feedback voltage;

(f) detecting the voltage across the surge protector at a predetermined time during the duration of said voltage pulse;

(g) comparing said voltage across the surge protector to a predetermined voltage to produce a pass/fail signal;

(h) inverting the voltage across said voltage source to form an inverted supply voltage;

(i) attenuating said inverted supply voltage to form an attenuated, inverted supply voltage;

(j) summing said attenuated, inverted supply voltage to said surge protector voltage to form a second summed voltage; and

(k) decreasing said error voltage if said second summed voltage is less than a reference potential and if said predetermined time has elapsed.