Molybdenum substrate thick film circuit

• US 4,313,262 A
• Filed: 12/17/1979
• Issued: 02/02/1982
• Est. Priority Date: 12/17/1979
• Status: Expired due to Term

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: General Electric Company
• Inventors: Mogle, Rodman A., Barnes, Norman S.
• Primary Examiner(s): Crosby, Gene P.
• Assistant Examiner(s): Arbes, C. J.
• Application Number:
  US06/103,984
• Time in Patent Office: 778 Days
• Field of Search: 29/840, 29/846, 29/850, 29/831, 264/61, 156/89, 174/68.5
• US Class Current: 29/840
• CPC Class Codes: H01L 21/4867 Applying pastes or inks, e.g. screen printing H01L21/486 takes precedence
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/142 Metallic substrates having insulating layers
• CPC Class Codes: H01L 23/5383 Multilayer substrates H01L23/5385 takes precedence; multilayer metallisation on monolayer substrates H01L23/538
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/15192 Resurf arrangement of the internal vias
• CPC Class Codes: H05K 1/053 the metal substrate being covered by an inorganic insulating layer
• CPC Class Codes: H05K 1/092 Dispersed materials, e.g. conductive pastes or inks
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: Y10T 29/49128 Assembling formed circuit to base
• CPC Class Codes: Y10T 29/49144 by metal fusion
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base

Abstract

An improved multilayered circuit is disclosed comprising a molybdenum substrate with alternating layers of dielectric and conducting thick film materials deposited thereon. The molybdenum substrate has the advantages of being its own chassis, having a coefficient of thermal expansion that is well matched to the thick film materials and component ceramic chip carriers, and having a high thermal conductivity so as to act as its own heat sink.

Claims

1. A method of making a large area multilayer printed circuit structure comprising:

a. providing a substrate material made of molybdenum;

b. screen printing a first layer of dielectric material and allowing said dielectric to dry;

c. firing said first dielectric layer;

d. repeating steps b and c until the desired number of dielectric layers have been printed, said dielectric layers having an uppermost dielectric layer with a top surface;

e. screen printing a first conductor circuit over the top surface of the uppermost dielectric layer and allowing said first conductor to dry;

f. firing said first conductor, said first conductor having a top surface;

g. screen printing a second layer of dielectric material over the top surface of said first conductor and the uppermost layer of said first dielectric layers and allowing said second dielectric layer to dry;

h. firing said second dielectric; and

i. repeating steps e, f, g and h until the desired number of dielectric-conductor layers have been printed.

2. A method of making a multilayer structure as set forth in claim 1, wherein said repeated steps of screen printing the dielectric involves first printing two layers of dielectric with a patterned screen which patterns many voids in the dielectric so as to create many vias therein, screen printing to fill the vias with conductor material, and then screen printing layers of dielectric before screen printing of the printed circuit conductor layer.

3. The method of fabricating a multilayer structure as set forth in claim 1, wherein components are bonded or soldered to the top surface of the multilayer structure and thus interconnected to at least one exposed conductor.

4. The method of fabricating a multilayer structure as set forth in claim 1, where said drying steps include exposure to air at 125°

C. for approximately 15 minutes.

5. The method of fabricating a multilayer structure as set forth in claim 1, where said firing of each of said dielectric layers includes:

(a) utilizing a continuous belt furnace consisting of a plurality of temperature zones;

(b) burning out an organic binder in said dielectric at temperatures from 0°

to 400°

C. in a nitrogen atmosphere of from 0 to 600 parts per million of oxygen;

(c) firing said dielectric at a peak temperature of from 850°

to 925°

for 4 to 10 minutes during a total furnace cycle time of 30-60 minutes in nitrogen atmosphere of less than 15 parts per million of oxygen.

6. The method of fabricating a multilayer structure as set forth in claim 1, where said firing of said conductor layer includes:

(a) utilizing a continuous belt furnace consisting of a plurality of temperature zones;

(b) burning out an organic binder in said conductor at temperatures from 0°

to 400°

C. in a nitrogen atmosphere of less than 15 parts per million of oxygen;

(c) firing said conductor at a peak temperature of from 850°

-925°

C. for 4 to 10 minutes during a total furnace cycle time of 30-60 minutes in a nitrogen atmosphere of less than 15 parts per million of oxygen.