Non-linear logic module for increasing complexity of bit sequences
First Claim
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1. A non-linear digital generator circuit for producing controllably complex bit sequences comprising in combination:
- a plurality of shift registers each being of predetermined bit length, each of said plurality of shift registers comprising;
a first segmented portion being controllable as to a bit delay length between an input thereto and an output thereof; and
a second segmented portion having a fixed bit length for implementing a predetermined span between an input thereto and an output thereof, said input being derived from said output of said first segmented portion;
means for controlling said bit length of each of said plurality of first segmented portions of said plurality of shift registers;
a plurality of means for combining said inputs and outputs of each of said second segmented portions, each of said combining means having an output thereof; and
means for modulo-two adding said outputs of said plurality of said combining means.
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Abstract
A logic system for implementation of a feed-forward non-linear generator for producing a plurality of programmable complex sequences from an input bit stream.
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2 Claims
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1. A non-linear digital generator circuit for producing controllably complex bit sequences comprising in combination:
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a plurality of shift registers each being of predetermined bit length, each of said plurality of shift registers comprising; a first segmented portion being controllable as to a bit delay length between an input thereto and an output thereof; and a second segmented portion having a fixed bit length for implementing a predetermined span between an input thereto and an output thereof, said input being derived from said output of said first segmented portion; means for controlling said bit length of each of said plurality of first segmented portions of said plurality of shift registers; a plurality of means for combining said inputs and outputs of each of said second segmented portions, each of said combining means having an output thereof; and means for modulo-two adding said outputs of said plurality of said combining means. - View Dependent Claims (2)
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Specification