Dynamically variable priority, variable position channels in a TDMA burst
First Claim
1. In a TDMA communication system, a method for increasing transmission bandwidth, comprising the steps of:
- accumulating a first channel of data over a plurality of TDMA frames in a first buffer;
transferring said first channel of accumulated data to a second buffer for transmission;
accumulating a second channel of data in said first buffer;
deferring the transmission of said first channel of data when the transmission of higher priority data leaves insufficient capacity for transmitting said first channel while accumulating said second channel;
increasing the priority of said first channel of data above that for said higher priority data and transmitting said first channel when said accumulation of said second channel of data is completed.
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Abstract
The position of a channel of information transmitted from a particular port is varied in response to the changing priority of that port'"'"'s messages as time passes. Variable priority assignments become necessary when low speed data has been deferred in its transmission until a time just prior to the production of a second unit of data. The effect of changing the priority of deferred data messages in a TDMA burst is to change the relative position of the associated channel within the TDMA burst by means of compiling the address of that message in a higher priority threaded list. The mechanism by which a deferred data message has its priority changed from an initial low value to a subsequent higher value is by measuring the amount of time remaining for retaining a deferred data message relative to the expected time of arrival of the next data message, the impending arrival of a new message causing the priority of the deferred message to be increased, thereby increasing the probability of its successful transmission.
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Citations
8 Claims
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1. In a TDMA communication system, a method for increasing transmission bandwidth, comprising the steps of:
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accumulating a first channel of data over a plurality of TDMA frames in a first buffer; transferring said first channel of accumulated data to a second buffer for transmission; accumulating a second channel of data in said first buffer; deferring the transmission of said first channel of data when the transmission of higher priority data leaves insufficient capacity for transmitting said first channel while accumulating said second channel; increasing the priority of said first channel of data above that for said higher priority data and transmitting said first channel when said accumulation of said second channel of data is completed.
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2. In a TDMA communication system, an apparatus for increasing transmission bandwidth, comprising:
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a first buffer for accumulating a first channel of data over a plurality of TDMA frames; a second buffer connected to said first buffer, for storing said first channel of accumulated data for transmission; means for deferring the transmission of said first channel of data when the transmission of higher priority data leaves insufficient capacity for transmitting said first channel while accumulating a second channel of data in said first buffer; means for increasing the priority of said first channel of data above that for said higher priority data and transmitting said first channel when said accumulation of said second channel of data is completed.
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3. In a TDMA communication system, each ground station having a plurality of digital ports connected to signal sources, divided into a first subplurality for transferring information having a relatively high priority and a second subplurality for transmitting information having a relatively lower priority, each station including a message memory for storing messages from said first and second subpluralities of ports, having addressable storage locations, and a threaded address memory for storing the addresses of the information stored in said message memory corresponding to said first and second subplurality of ports, respectively, means for changing the relative position of a message in a TMDA burst comprising:
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means connected to one of said lower priority ports, for establishing the time of arrival of a terrestrial signal to said one port; address storage means having outputs connected to said threaded address memory, for storing the addresses of messages in said message memory corresponding to all of said plurality of ports; gating means connected between said address memory means and said threaded address memory, having a control input connected to said timing means, for storing the message address corresponding to one port in a first list in said threaded address memory, during a first TDMA frame so that the message originating from said one port occupies a later portion of the TDMA burst therein; said gating means storing said message address corresponding to said one port in a second list in said threaded address memory during a later TDMA frame in response to said timing means, to effectively confer a higher priority to said message so that it occurs in an earlier portion of said TDMA burst; whereby said message has its priority increased as time passes so that its relative position in a TDMA burst becomes earlier in succeeding TDM frames, thereby reducing the probability of freeze-out. - View Dependent Claims (4)
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5. In a TDMA communications network, a TMDA burst channel priority changing mechanism, comprising:
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a fixed location initial pointer memory for storing in a fixed order the heads of threaded lists of port types, each port type having a different priority for transmission; a burst ordered initial pointer memory for storing said heads of said threaded lists in a desired order for TDMA bursting; a port type indicating counter, having a first input connected to a timing mechanism, having a first plurality of outputs for sequentially outputting enabling signals in a predetermined order of priority and a second plurality of outputs for outputting enabling signals in said predetermined order of priority, said first plurality of outputs transmitting enabling pulses before said second plurality of outputs as said timing mechanism inputs sequential signals to said counter; a low speed data priority ROS having first inputs connected to said first outputs of said counter and a second input connected to a TDMA frame counting timer, for storing the pattern of correlation between low speed data port types whose transmission can be deferred and the TDMA frame count, and an output for transmitting an enabling signal when the last frame count is input for which a low speed data port type corresponding to one of said first inputs can be transmitted; a fixed location address store having inputs gatably connected to said first plurality of outputs from said counter under control of said output from said low speed data priority ROS and an output connected as the address input to said fixed location initial pointer memory, for accessing locations in said fixed location initial pointer memory in response to one of said first plurality of outputs from said counter being gatably connected by said low speed data priority ROS to said fixed location address stores; a write address counter connected to the output of said fixed location address store, for accessing a first position in said burst ordered initial pointer area to enable the transfer of said accessed initial pointer in said fixed location initial pointer area to said first position in said burst ordered initial pointer area accessed by said write address counter; each of said second outputs of said port type counter being gatably connected to corresponding inputs of said fixed location address store under control of inhibiting means connected to said low speed data priority ROS output;
whereby said heads of threaded lists for said low speed data port types whose last frame for transmission has been detected, are burst before other low speed data port types.
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6. In a satellite communication system including a plurality of ground stations which intercommunicate in TDMA mode via a satellite transponder, each ground station having a radio frequency burst modem for transmitting a time divided sequence of information channels during an assigned burst period of a TDMA frame, each ground station having a plurality of digital ports connected to terrestrial signal sources, divided into a first subplurality for transferring information having a relatively high priority and a second subplurality for transmitting information having a relatively lower priority, each station including a message memory for storing messages from said first and second subpluralities of ports, having addressable storage locations, and a threaded address memory for storing the addresses of the information stored in said message memory corresponding to said first and second subplurality of ports, respectively, said burst period duration being assigned based on a statistical assessment of demand at each ground station, means for changing the relative position of a message in said TDMA burst at a given station, comprising:
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means connected to one of said lower priority ports, for establishing the time of arrival of a terrestrial signal to said one port; address storage means having outputs connected to said threaded address memory, for storing the addresses of messages in said message memory corresponding to all of said plurality of ports; gating means connected between said address memory means and said threaded address memory, having a control input connected to said timing means, for storing the message address corresponding to one port in a first list in said threaded address memory, during a first TDMA frame so that the message originating from said one port occupies a later portion of the TDMA burst therein; said gating means storing said message address corresponding to said one port in a second list in said threaded address memory during a later TDMA frame in response to said timing means, to effectively confer at a higher priority to said message so that it occurs in an earlier portion of said TDMA burst; whereby said message has its priority increased as time passes so that its relative position in a TDMA burst becomes earlier in succeeding TDMA frames, thereby reducing the probability of freeze-out. - View Dependent Claims (7)
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8. In a TDMA satellite communications network, a TDMA burst channel priority changing mechanism, comprising:
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a fixed position initial pointer memory for storing in a fixed order the heads of threaded lists of port types, each port type having a different priority for transmission; a burst ordered initial pointer memory for storing said heads of said threaded lists in a desired order for TDMA bursting; a port type indicating means, having a first input connected to a timing mechanism, having a first plurality of outputs for sequentially outputting enabling signals in a predetermined order of priority and a second plurality of outputs for outputting enabling signals in said predetermined order of priority, said first plurality of outputs transmitting enabling pulses before said second plurality of outputs as said timing mechanism inputs sequential signals to said counter; a low speed data priority ROS having first inputs connected to said first outputs of said counter and a second input connected to a TDMA frame counting timer, for storing the pattern of correlation between low speed data port types whose transmission can be deferred and the TDMA frame count, and an output for transmitting an enabling signal when the last frame count is input for which a low speed data port type corresponding to one of said first inputs can be transmitted. a fixed location address store having inputs gatably connected to said first plurality of outputs from said counter under control of said output from said low speed data priority ROS and an output connected as the address input to said fixed location initial pointer memory, for accessing locations in said fixed location initial pointer memory in response to one of said first plurality of outputs from said counter being gatably connected by said low speed data priority ROS to said fixed location address store; a write address counter connected to the output of said fixed location address store, for accessing a first position in said burst ordered initial pointer area to enable the transfer of said accessed initial pointer in said fixed location initial pointer area to said first position in said burst ordered initial pointer area accessed by said write address counter; each of said second outputs of said port type counter being gatably connected to corresponding inputs of said fixed location address store under control of inhibiting means connected to said low speed data priority ROS output; whereby said heads of threaded lists for said low speed data port types whose last frame for transmission has been detected, are burst before other low speed data port types.
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Specification