×

Differential-input amplifier circuitry with increased common-mode _voltage range

  • US 4,345,213 A
  • Filed: 02/28/1980
  • Issued: 08/17/1982
  • Est. Priority Date: 02/28/1980
  • Status: Expired due to Term
First Claim
Patent Images

1. An amplifying circuit operable with input signals having a common-mode component anywhere within a range approaching and including at least one of the operating potentials applied to said amplifying circuit, in combination:

  • first and second supply terminals for receiving operating potential therebetween;

    first and second field-effect transistors of a first conductivity type, each having gate, drain, source and substrate electrodes;

    means for connecting said first and second transistors in long-tailed-pair connection including first and second input terminals to which the respective gate electrodes of said first and second transistors connect for receiving input signals, a tail connection to which the respective source electrodes of said first and second transistors connect for receiving a tail current, first and second output connections to which the respective drain electrodes of said first and second transistors connect;

    tail current supply means connected between said first supply terminal and said tail connection for supplying said tail current;

    means for applying offsetting potentials between the respective substrate and source electrodes of both said first and second transistors, which offsetting potentials are of a polarity for maintaining the potential at the respective substrate electrodes of said first and second transistors closer to the potential at said first supply terminal than is the potential at the source electrodes of said first and second transistors, said offsetting potentials varying responsive to said common-mode component for tending to operate said first and second transistors towards depletion mode when the value of said common-mode component approaches the potential at said first supply terminal more closely than a predetermined voltage and tending to operate said first and second transistors towards enhancement mode when the value of said common-mode component departs from the potential at said first supply terminal by more than said predetermined voltage, said offsetting potentials conditioning said long-tailed pair connection for providing signals at its output connections responsive to said input signals when the common-mode component of said input signals is at a potential between the potentials at said first and second supply terminals and including at least the potential at one of said first and second supply terminals; and

    differential to single-ended signal converting means including;

    third and fourth transistors of a second conductivity type, having respective output electrodes connected respectively to the first and second output connections of said long-tailed-pair connection, having respective input electrodes, and having respective common electrodes connected to said second supply terminal,potential-follower means with an input connection at the output electrode of said third transistor and with an output connection at an interconnection between the respective input electrodes of said third and fourth transistors, which potential-follower means is for exhibiting a predetermined offsetting potential between its input and output connections to operate the output electrode of said third transistor at a potential between the potential at the input electrode of said third transistor and the potential at said second supply terminal including the potential at the input electrode of said third transistor, and,output means for operating the output electrode of said fourth transistor at a potential between the potential at the input electrode of said fourth transistor and the potential at said second supply terminal including the potential at the input electrode of said fourth transistor, and for supplying output signals related to the difference between the signals at the first and second output connections of said long-tailed-pair connection.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×