Hierarchical-structure plant control system
First Claim
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1. A hierarchical-structure plant control system comprising:
- a master controller for computing a plurality of control command signals which are provided respectively corresponding to a plurality of operation terminals of a plant;
a plurality of sub-loop controllers each connected to the master controller through a system bus, and each of which is supplied with the corresponding one of said plurality of control command signals to produce a control output for controlling the positions of the corresponding one of the plurality of operation terminals on the basis of a stored control program;
a host computer for storing a part of the control programs for the plurality of sub-loop controllers and, if one of said plurality of sub-loop controllers breaks down, producing a command which permits the position of the corresponding operation terminal to change in place of the broken-down sub-loop controller;
a plurality of analog memories respectively corresponding to said plurality of sub-loop controllers and connected to said host computer through a common signal line each of which stores a value of a control signal from the corresponding sub-loop controller upon a first operation mode, and increases or decreases the stored value in response to the command from the host computer upon a second operation mode, andtransmitting means for, when one of the plurality of sub-loop controllers breaks down, transmitting the failure occurrence information to said host computer, supplying an output of the analog memory corresponding to the broken-down sub-loop controller to the corresponding operation terminal in place of the output of the broken-down sub-loop controller, and changing the operation mode of the corresponding analogy memory into the second operation mode.
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Abstract
Sub-loop controllers arranged around a microprocessor are assigned to operation terminals to be controlled, and connected to a master controller and a host computer through a system bus to be supplied with a control command therefrom. Analog memories for manual control of the operation terminals are connected to the host computer through a special, common wiring. If one of the sub-loop controllers breaks down, the host computer directly controls the operation terminal by use of this analog memory thereby to back up the sub-loop controller.
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Citations
6 Claims
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1. A hierarchical-structure plant control system comprising:
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a master controller for computing a plurality of control command signals which are provided respectively corresponding to a plurality of operation terminals of a plant; a plurality of sub-loop controllers each connected to the master controller through a system bus, and each of which is supplied with the corresponding one of said plurality of control command signals to produce a control output for controlling the positions of the corresponding one of the plurality of operation terminals on the basis of a stored control program; a host computer for storing a part of the control programs for the plurality of sub-loop controllers and, if one of said plurality of sub-loop controllers breaks down, producing a command which permits the position of the corresponding operation terminal to change in place of the broken-down sub-loop controller; a plurality of analog memories respectively corresponding to said plurality of sub-loop controllers and connected to said host computer through a common signal line each of which stores a value of a control signal from the corresponding sub-loop controller upon a first operation mode, and increases or decreases the stored value in response to the command from the host computer upon a second operation mode, and transmitting means for, when one of the plurality of sub-loop controllers breaks down, transmitting the failure occurrence information to said host computer, supplying an output of the analog memory corresponding to the broken-down sub-loop controller to the corresponding operation terminal in place of the output of the broken-down sub-loop controller, and changing the operation mode of the corresponding analogy memory into the second operation mode. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification