Remote meter reading apparatus

• US 4,352,104 A
• Filed: 05/05/1980
• Issued: 09/28/1982
• Est. Priority Date: 05/07/1979
• Status: Expired due to Term

• Current Assignee: Ricoh Company Limited
• Original Assignee: Ricoh Company Limited
• Inventors: Abe, Takeshi, Yoshihara, Ichiro, Saito, Kazuhito, Mizuta, Toshiaki
• Primary Examiner(s): YUSKO, DONALD
• Application Number:
  US06/146,570
• Time in Patent Office: 876 Days
• Field of Search: 340/151, 340/152 R, 340/870.02, 340/870.03, 340/870.39, 235/92 EL
• US Class Current: 340/870.02
• CPC Class Codes: G01R 21/00 Arrangements for measuring electric power or power factor G01R7/12 takes precedence
• CPC Class Codes: G08C 19/18 using a variable number of pulses in a train
• CPC Class Codes: H04L 7/00 Arrangements for synchronising receiver with transmitter synchronisation of generators of electric oscillations or pulses H03L7/00
• CPC Class Codes: H04Q 9/14 Calling by using pulses

Abstract

A remote meter reading unit (22) feeds clock pulses to a meter (23) over a transmission line (34). The meter (23), in synchronism with the clock pulses, feeds a predetermined number of synchronization signals, a predetermined number of meter data signals and a predetermined number of redundancy signals back to the reading unit (22).

Claims

1. A remote meter reading apparatus comprising meter means, reading means located remotely from the meter means and communication line means connecting the reading means to the meter means, the reading means being constructed to feed clock pulses to the meter means, the meter means being constructed to feed a predetermined number of synchronization signals followed by a predetermined number of meter data signals followed by a predetermined number of redundancy signals to the reading means in response to and in synchronism with the clock pulses, the synchronization signals and the redundancy signals being different from each other.

2. An apparatus as in claim 1, in which the meter means comprises bit counter means having a plurality of stages which sequentially produce high outputs in response to the clock pulses, digit counter means having a plurality of stages which sequentially produce high outputs in response to overflow signals from the bit counter means, a plurality of AND gate means having gate inputs connected to the outputs of the stages of the bit counter means respectively, OR gate means having inputs connected to outputs of all of the AND gate means and a meter for selectively connecting inputs of the AND gate means to outputs of the stages of the bit counter means in accordance with a meter reading.

3. An apparatus as in claim 2, in which the meter means comprises a capacitor which is charged by the clock pulses and constitutes a power source for the bit counter means and the digit counter means.

4. An apparatus as in claim 2, in which the digit counter means further comprises a first stage which produces a high output before said stages of the digit counter means and is connected to an input of the OR gate means.

5. An apparatus as in claim 2, in which the digit counter means further comprises an unconnected last stage which produces a high output after said stages of the digit counter means.

6. An apparatus as in claim 2, in which the bit counter means comprises an unconnected last stage which produces a high output after said stages of the bit counter means.

7. An apparatus as in claim 2, further comprising power gate means connected between the stages of the bit counter means and the meter means respectively in such a manner that gate inputs of the power gate means are connected to the stages of the bit counter means and outputs of the power gate means are connected to the meter, inputs of all of the power gate means being connected to the communication line means.

8. An apparatus as in claim 2, in which the digit counter means further comprises an auxiliary stage, the meter means further comprising an auxiliary AND gate means having a gate input connected to an auxiliary stage output of the digit counter means an output connected to an input of the OR gate means and switch means for connecting an input of the auxiliary AND gate means to a selected one of the stage outputs of the bit counter means.

9. An apparatus as in claim 2, in which the meter comprises first and second independent meter sections for providing first and second meter readings respectively.

10. An apparatus as in claim 2, in which the meter means further comprises auxiliary digit counter means having a plurality of stages which sequentially produce high outputs in response to overflow signals from the bit counter means, a plurality of auxiliary AND gate means having gate inputs connected to outputs of the stages of the bit counter means respectively, auxiliary OR gate means having inputs connected to outputs of all of the auxiliary AND gate means, an auxiliary meter for selectively connecting inputs of the auxiliary AND gate means to outputs of the stages of the bit counter means in accordance with an auxiliary meter reading, meter counter means having first and second stages which sequentially produce high outputs in response to overflow signals from said digit counter means, selector AND gate means having gate inputs connected to outputs of the stages of the selector gate means respectively and inputs connected to outputs of said OR gate means and the auxiliary OR gate means respectively and selector OR gate means having inputs connected to outputs of the selector AND gate means respectively.

11. A remote meter reading apparatus comprising meter means, reading means located remotely from the meter means and communication line means connecting the reading means to the meter means, the reading means being constructed to feed clock pulses to the meter means, the meter means being constructed to feed a predetermined number of synchronization signals followed by a predetermined number of meter data signals followed by a predetermined number of redundancy signals to the reading means in synchronism with the clock pulses;

the meter means comprising bit counter means having a plurality of stages which sequentially produce high outputs in response to the clock pulses, digit counter means having a plurality of stages which sequentially produce high outputs in response to overflow signals from the bit counter means, a plurality of AND gate means having gate inputs connected to the outputs of the stages of the bit counter means respectively, OR gate means having inputs connected to outputs of all of the AND gate means and a meter for selectively connecting inputs of the AND gate means to outputs of the stages of the bit counter means in accordance with a meter reading.