Fabrication of circuit packages

• US 4,352,449 A
• Filed: 12/26/1979
• Issued: 10/05/1982
• Est. Priority Date: 12/26/1979
• Status: Expired due to Term

• Current Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Original Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Inventors: Morabito, Joseph M., Hall, Peter M., Rickabaugh, Lawrence J., Howland, Frank L.
• Primary Examiner(s): Ramsey, Kenneth J.
• Application Number:
  US06/107,327
• Time in Patent Office: 1,014 Days
• Field of Search: 228/123, 228/124, 228/180 A, 228/188, 228/246
• US Class Current: 228/123.1
• CPC Class Codes: H01L 2224/8319 Arrangement of the layer connectors prior to mounting
• CPC Class Codes: H01L 2224/8385 using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 24/26 Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01012 Magnesium [Mg]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01039 Yttrium [Y]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/0105 Tin [Sn]
• CPC Class Codes: H01L 2924/01061 Promethium [Pm]
• CPC Class Codes: H01L 2924/01072 Hafnium [Hf]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/01077 Iridium [Ir]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01084 : Polonium [Po]
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H05K 2201/09181 : Notches in edge pads
• CPC Class Codes: H05K 2201/10727 : Leadless chip carrier [LCC], e.g. chip-modules for cards
• CPC Class Codes: H05K 2201/10984 : Component carrying a connection agent, e.g. solder, adhesive soldering leadless components having an array of bottom contacts H05K3/3436; BGA components H05K2201/10734
• CPC Class Codes: H05K 2203/041 : Solder preforms in the shape of solder balls soldering leadless components having an array of bottom contacts H05K3/3436
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: H05K 3/3442 : having edge contacts, e.g. leadless chip capacitors, chip carriers
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of fabricating circuit packages which employ macro-components (10) mounted on supporting substrates (20). In order to maintain sufficient clearance between the component and substrate and achieve high reliability bonds, massive solder preforms (16) are applied to contact pads on either the component or substrate. After contact pads of both carrier and substrate are brought into contact with the spheres, the bond is formed.

Claims

1. A method of fabricating a circuit package comprising the steps of providing an electrical macro-component (10 of FIG. 1) which includes a first set of contact pads (14) formed on one surface thereof, providing a supporting insulating substrate (20 of FIG. 3) which includes a second set of contact pads (25) formed on one surface thereof corresponding to the first set of contact pads on the macro-component, and bonding the macro-component to the substrate by soldering said sets of contact pads together, characterized in that said pads include a solder wettable layer of gold thereon, and said soldering is done by bonding large lead-tin solder preforms (16) onto one of said sets of contact pads, bringing the other set of contact pads into contact with the preforms, and bonding the preforms to the said other set of contact pads so that the weight of the macro-component is supported by the solder preforms while maintaining a gap between the macro-component and the substrate of at least 10 mils.

3. The method according to claim 1 wherein the macro-component comprises a ceramic chip carrier.

4. The method according to claim 1 wherein the supporting substrate further includes a film circuit formed thereon.

5. The method according to claim 1 wherein the preforms are spheres with a diameter which lies within the range 20-40 mils.

7. The method according to claim 1 wherein the preforms are bonded to one set of contact pads by applying a flux to said contact pads, placing the preforms on the pads, and reflowing the solder by heating to a temperature at least as great as the melting point of the solder.

8. The method according to claim 1 wherein the preforms are bonded to the said other set of contact pads by heating at a temperature at least as great as the melting point of the solder.

9. The method according to claim 1 wherein the solder comprises a mixture of 60% tin and 40% lead.

10. The method according to claim 1 wherein the contact pads on the supporting substrate comprise successive layers of titanium, palladium and gold.

11. The method according to claim 1 wherein the contact pads on the macro-component comprise successive layers of tungsten, nickel and gold.

2. A method of fabricating a hybrid integrated circuit package comprising the steps of providing a dielectric chip carrier (10) including a semiconductor integrated circuit chip (12) mounted thereon, a hermetic seal, and a first set of contact pads (14) formed on the surface of the carrier opposite to that of the chip, the combined weight of the component being at least 100 mg, providing a supporting insulating substrate (20) which includes on one surface thereof a second set of contact pads (25) corresponding to the contact pads on the carrier, and bonding said carrier to said substrate by soldering said sets of contact pads together, characterized in that said substrate also includes a film circuit (21, 23, 24) on the same surface as the contact pads with at least some components lying in the area over which the chip carrier is mounted to the substrate;

said pads include a solder wettable layer of gold thereon; and

the soldering is done by;

bonding lead-tin solder spheres (16) onto one set of contact pads, the spheres having a diameter within the range 20-40 mils;

bringing the spheres into contact with the other set of contact pads; and

heating the structure to at least the melting point of the solder to reflow the solder and thereby establish a bond while the weight of the macro-component is supported by the solder spheres to produce a gap height of at least 10 mils.

6. The method according to claim 5 or 2 wherein the diameter of the spheres is less than or equal to that value which satisfies the relationships:

##EQU8## D is the diameter of the sphere;

P is the equivalent diameter of the contact pads;

W_c is the weight per pad of the macro-component;

H_c is the gap distance between the macro-component and the substrate and S is the surface tension of the solder.

12. A method of fabricating a circuit package comprising the steps of providing an electrical macro-component (10 of FIG. 1) which includes a first set of contact pads (14) formed on one surface thereof, providing a supporting insulating substrate (20 of FIG. 3) which includes a second set of contact pads (25) formed on one surface thereof corresponding to the first set of contact pads on the macro-component, and bonding the macro-component to the substrate by soldering said sets of contact pads together, characterized in that said soldering is done by bonding large solder preforms (15) onto one of said sets of contact pads, bringing the other set of contact pads into contact with the preforms, and bonding the preforms to the said other set of contact pads while the macro-component is mounted on the bottom surface of the substrate so that the solder preforms are stretched by the weight of the component resulting in a gap between the macro-component and the substrate of at least 10 mils.