Circuit arrangement and method for multi-address switching operations

• US 4,354,261 A
• Filed: 03/10/1980
• Issued: 10/12/1982
• Est. Priority Date: 03/30/1979
• Status: Expired due to Term

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Hagen, Rolf, Linck, Diethard, Pappenberger, Joerg
• Primary Examiner(s): BROWN, THOMAS
• Application Number:
  US06/129,396
• Time in Patent Office: 946 Days
• Field of Search: 370/42, 370/43, 370/41, 370/61, 370/67, 370/84, 370/79, 178/3, 178/4
• US Class Current: 370/299
• CPC Class Codes: H04L 12/18 for broadcast or conference , e.g. multicast

Abstract

A circuit arrangement for multi-address switching operations of digital encoded signals between a calling data terminal and a variety of called data terminals operating with different data transmission procedures is adapted for use with an electronic data switching system and comprises at least two interface circuits having input/output converting networks. External input terminals of these interface circuits are adapted for connection with respective input/output units of the electronic data switching system for each type of data terminal. Internal input/output terminals are connected to a storage unit for storing a multi-address message, including data information to be transmitted and identification information of the called data terminals. A control unit is provided for controlling the input/output operations and transmitting the buffered data information separately and in sequence to each of the called data terminals one after another across the interface circuit assigned to the currently called type of data terminal and with the respective data transmission procedures.

Claims

1. A circuit arrangement for multi-address switching operations of a message composed of digital encoded signals between a calling data terminal and a variety of called data terminals operating with different data transmission procedures including signalling, data format and data transmission rate, said circuit arrangement adapted for use with an electronic data switching system and comprising in combination:

(a) at least two interface circuits each having an external interface input, an external interface output, an internal interface input, an internal interface output and an interface control terminal, and each having input/output converting networks connected to said interface inputs and outputs, each of said external interface inputs being adapted for connection with respective output means of the electronic data switching system for receiving digital signals from one type of data terminal and each of said external interface outputs being adapted for connection with respective input means of the electronic data switching system for transmitting digital signals to said type of data terminal;

(b) storage means for storing the message being sent from the calling data terminal and including data information to be transmitted and identification information of the called data terminals, said storage means having a storage input, a storage output and a storage control terminal, said internal interface input and said storage input being connected in parallel to said storage output and said internal interface output respectively; and

(c) control means for controlling the input/output operations of said storage means such that said data information is sent out in sequence to each of the called data terminals one after another by means of a separate line connection across the respective interface circuit assigned to the currently called type of data terminal and with a data transmission procedure associated with the currently called type of data terminal.

2. The circuit arrangement as recited in claim 1, wherein at least a first interface circuit further comprises an input/output converting network designed for converting both signalling information and data information.

3. The circuit arrangement as recited in claim 2, wherein at least a second interface circuit further comprises:

(a) a second input/output converting network for converting signalling information identifying called data terminals; and

(b) a transmitting network arranged in parallel with that second input/output converting network for changing the data format of data information and for transmitting data information to a called data terminal.

4. The circuit arrangement as recited in claim 3, wherein said second interface circuit further comprises a multiplexor network having two multiplexor inputs and one multiplexor output, each of said multiplexor inputs connected to an output of the second input/output converting network and the transmitting network, respectively, and said multiplexor output forming the external interface output of said second interface circuit and being adapted for connection with said input means for transmitting digital signals to the electronic data switching system, whereby the multiplexor network is controlled to selectively couple said second input/output converting network and said transmitting network to said input means.

5. The circuit arrangement as recited in claim 4, wherein said control means comprises a microprocessor system.

6. The circuit arrangement as recited in claim 5, wherein the microprocessor system comprises a processor unit, a separate control memory for storing control routines of data transmission procedures and multi-address switching routines, and a bus structure having address lines, data lines, and control lines to which lines respective inputs and outputs of the processor unit, the control memory, the storage unit means and the respective ones of said internal interface inputs and outputs and said interface control terminals are connected in parallel.

7. The circuit arrangement as recited in claim 6, wherein said processor unit, upon request of a busy interface circuit, allocates access to the bus structure as to connect the storage unit means to the requesting interface circuit for buffering the message and then to respective interface circuits for multi-address transmitting of the buffered data information in sequence, each of said interface circuits being assigned to a called type of data terminal.

8. The circuit arrangement as recited in claim 7, wherein said processor unit has at least one interrupt input, and at least one interface circuit has a separate control output, said interrupt input and said control output being connected by a separate control line.

9. The circuit arrangement as recited in any one of the claims 1-8, wherein each of the input means for receiving digital signals and each of the output means for transmitting digital signals connected to an interface circuit comprises one line adapter of a different set of said line adapters forming the connection unit of the electronic data switching system for one type of data terminal, and wherein a multi-address message from a data terminal received by one line adapter is transmitted to the circuit arrangement for multi-address switching across the line adapter connected to the respective interface circuit and, after having been stored, the data information of said message is read out in sequence to a line adapter of the line adapter set forming the connection unit for the type of data terminal receiving the currently transmitted data information.

10. A method for performing multi-address switching operation of a message composed of digital encoded signals between a calling data terminal and a variety of called data terminals operating with different transmission procedures including signalling, data format and data transmission rate controlled by an electronic data switching system serving different types of data terminals and having a respective set of line adapters for each different type of data terminals, said method comprising the steps of:

(a) sending a call request and signalling information from a calling data terminal to a first line adapter belonging to the set of line adapters assigned to the sending type of data terminal;

(b) analyzing the information by the electronic data switching system and setting up a line connection from said first line adapter across a second line adapter of the same set of line adapters to a circuit arrangement for multi-address switching operations connected to all line adapter sets by respective line adapters;

(c) transmitting the message including identification information of data terminals to be called and data information to be distributed into said circuit arrangement and storing the message temporarily;

(d) selecting by said circuit arrangement based upon the said identification information, a receiving line adapter of the line adapter set assigned to the receiving type of data terminal;

(e) sending the data information forming a part of the message converted according to the data transmission procedure of the receiving type of data terminal to the selected receiving line adapter;

(f) switching the data information under control of the electronic data switching system to the receiving data terminal, thereby using the normal control facilities of said data switching system; and

(g) repeating the steps (d) to (f) in sequence for transmitting the data information to different data terminals at least until all available data terminals identified by the identification information have received the data information.

11. The method for switching digital encoded signals as recited in claim 10, wherein step (c) and step (d) are carried out under the control of the circuit arrangement for multi-address switching operation which comprises an independent processing system having interface circuits being assigned to a respective line adapter set to perform data input/output operations according to different data transmission procedures.