360 Degree closed circuit television system

• US 4,355,328 A
• Filed: 02/23/1981
• Issued: 10/19/1982
• Est. Priority Date: 02/23/1981
• Status: Expired due to Fees

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Kulik, John J.
• Primary Examiner(s): BRITTON, HOWARD W
• Application Number:
  US06/236,948
• Time in Patent Office: 603 Days
• Field of Search: 358/87, 358/183, 358/104, 434/43
• US Class Current: 348/38
• CPC Class Codes: G09B 9/063 by using visual displays
• CPC Class Codes: H04N 7/181 for receiving images from a plurality of remote sources

Abstract

A 360 degree closed circuit television system is disclosed which includes x background scene cameras, each camera of which scans a sixty degree segment of a background scene appearing on a 360 degree reflective display screen, and each camera of which provides a background information signal in response to scanning of the background scene; and six target cameras, each target camera of which scans a target, and each camera of which provides a target information signal in response to scanning of the target.

The background scene and target information signals are then supplied to an electronic gating circuit which synthesizes the background scene and target information signals so as to produce six background scene-target information signals. Each background scene-target information signal activates one of six projectors with each projector, in turn, broadcasting a sixty degree segment of the background scene upon one screen element of a hexagonal shaped transparent display screen. In addition, each projector broadcast on the transparent display screen the target for a predetermined time period such that an observer will observe the target moving around the transparent display screen. Movement of the target about the transparent display screen is controlled by a digital computer in accordance with a target movement program.

Claims

1. A 360 degree closed circuit television system comprising, in combination:

a 360 degree reflective display screen;

a background scene broadcast upon said 360 degree reflective display screen;

a plurality of background scene detecting means positioned within said 360 degree reflective display screen off the center thereof adapted for scanning said background scene with each of said detecting means scanning a predetermined angular segment in an azimuthal direction of said background scene, and providing, in response to the scanning of said background scene thereby, a background scene information signal, each of said background scene detecting means having a sync input and an output;

a target;

a plurality of target detecting means positioned adjacent to said target, each of said target detecting means having a sync input and an output adapted for scanning said target, and providing, in response to the scanning of said target thereby, a target information signal;

a transparent display screen having a plurality of rectangular shaped screen elements;

a plurality of projecting means, each projecting means of which has a sync input, a data input, and a blanking signal output, and each projecting means of which is positioned adjacent the outer surface of one of the screen elements of said transparent display screen for broadcasting upon the screen element of said transparent display screen positioned adjacent thereto one of the angular segments of said background scene, and said target for a predetermined time period such that an observer will observe the movement of said target upon said background scene around said transparent display screen;

master clock signal generating means having an output for producing a master clock signal having a series of uniformly spaced pulses of predetermined frequency;

a plurality of timing means, each timing means of which has an input connected to the output of said master clock signal generating means, and an output adapted for producing a plurality of sync signals, each sync signal of which is delayed for a predetermined time period from the master clock signal produced by said master clock signal generating means, and each sync signal of which activates one of said plurality of background scene detecting means so as to effect the scanning of said background scene thereby;

a plurality of waveform generating means, each of which has an input and an output with the inputs thereof respectively connected to the outputs of said plurality of timing means, and the outputs thereof respectively connected to the sync inputs of said plurality of projecting means adapted for producing, in response to the sync signals produced by said plurality of timing means, a plurality of segmental sawtooth waveform signals, each segmental sawtooth waveform signal of which activates one of said plurality of projecting means such that said plurality of projecting means will broadcast upon said transparent display screen said background scene and said target so as to eliminate from said background scene and said target any distortion therein, thereby improving the resolution thereof;

computing means having a plurality of sync outputs respectively connected to the sync inputs of said plurality of target detecting means, and a control output terminal for providing, in accordance with a target movement program utilized thereby, a plurality of sync signals so as to effect the activation of said plurality of target detecting means, for controlling the phase difference of the sync signals provided thereby with respect to the sync signals provided by said plurality of timing means so as to effect the movement of said target around said transparent display screen, and for producing at the control output terminal thereof a plurality of logic signals;

video information gating circuit means having a plurality of sync inputs respectively connected to the outputs of said plurality of timing means, a plurality of first data inputs respectively connected to the outputs of said plurality of background scene detecting means, a plurality of second data inputs respectively connected to the outputs of said plurality of target detecting means, a plurality of signal blanking inputs respectively connected to the signal blanking outputs of said plurality of projecting means, a control input terminal connected to the control output terminal of said computing means, and a plurality of outputs respectively connected to the data inputs of said plurality of projecting means adapted for synthesizing said target information signals with said background scene information signals so as to form a plurality of background scene-target information signals and thereby effect the broadcasting by said plurality of projecting means of said background scene and said target upon said transparent display screen, and for providing, in response to the logic signals produced by said computing means, for the blanking of multiple visual images of said target such that only one visual image of said target is visible upon said transparent display screen.

2. The 360 degree closed circuit television system of claim 1, wherein each of said background scene detecting means comprises a television camera.

3. The 360 degree closed circuit television system of claim 1, wherein each of said target detecting means comprises a television camera.

4. The 360 degree closed circuit television system of claim 1, wherein said target comprises a battleship.

5. The 360 degree closed circuit television system of claim 1, wherein said target comprises an aircraft.

6. The 360 degree closed circuit television system of claim 1, wherein said observer is a pilot.

7. The 360 degree closed circuit television of claim 1, wherein each of said timing means comprises a monostable multivibrator.

8. The 360 degree closed circuit television system of claim 1, wherein said video information gating circuit means comprises:

a plurality of gated video display circuits, each of which has a data input, a sync input, a blanking signal input, a control input terminal, and an output, with the data inputs thereof respectively connected to the outputs of said plurality of target detecting means, the sync inputs thereof respectively connected to the outputs of said plurality of timing means, the blanking signal inputs thereof respectively connected to the blanking signal outputs of said plurality of projecting means, and the control input terminals thereof connected to the control input terminal of said computing means; and

a plurality of electronic synthesizer circuits, each of which has a first data input, and a second data input, with the first data inputs thereof respectively connected to the outputs of said background scene detecting means, and the second data inputs thereof connected to the outputs of said plurality of gated video display circuits.

9. The 360 degree closed circuit television system of claim 8 wherein each of said gated video display circuits comprises:

a first AND gate having first and second inputs, and an output;

a second AND gate having first and second inputs, and an output;

a first OR gate having a first input connected to the output of said first AND gate, a second input connected to the output of said second AND gate, and an output;

a third AND gate having a first input connected to the first input of said first AND gate, a second input, and an output;

a fourth AND gate having a first input connected to the first input of said second AND gate, a second input, and an output;

a second OR gate having a first input connected to the output of said third AND gate, a second input connected to the output of said fourth AND gate, and an output;

an RS flip-flop having a set input connected to the output of said first OR gate, a reset input connected to the output of said second OR gate, and an output;

a fifth AND gate having an input, and an output;

a sixth AND gate having a first input connected to the output of said RS flip-flop, a second input, and an output;

a missing pulse detector having an input connected to the output of said fifth AND gate, and an output connected to the second input of said sixth AND gate;

a first delay comparator having first and second inputs, a first output connected to the second input of said second AND gate and the second input of said third AND gate, and a second output connected to the second input of said first AND gate and the second input of said fourth AND gate;

a second delay comparator having a first input connected to the first input of said first delay comparator, a second input connected to the second input of said first delay comparator, and an output;

a third delay comparator having a first input connected to the second input of said first delay comparator and the second input of said second delay comparator, a second input connected to the first input of said first delay comparator and the first input of said second delay comparator, and an output;

a third OR gate having a first input connected to the output of said sixth AND gate, a second input connected to the output of said second delay comparator, a third input connected to the output of said third delay comparator, a fourth input connected to the input of said fifth AND gate, and an output;

a first NOR gate having an input connected to the output of said third OR gate, and an output;

a second NOR gate having a first input connected to the output of said first NOR gate, a second input, and an output;

a seventh AND gate having a first input connected to the output of said first NOR gate, a second input connected to the second input of said second NOR gate, and an output;

a fourth OR gate having a first input connected to the output of said seventh AND gate, a second input connected to the output of said second NOR gate, and an output; and

an inhibit gate having an input connected to the output of said third OR gate.

10. The 360 degree closed circuit television system of claim 1, further characterized by a 360 degree annular image transfer apparatus positioned so as to project upon said 360 degree reflective display screen said background scene.

11. A display apparatus comprising, in combination:

a 360 degree reflective display screen;

a background scene broadcast upon said 360 degree reflective display screen;

first, second, third, fourth, fifth, and sixth background scene cameras positioned within said 360 degree reflective display screen off the center thereof such that each of said background scene cameras scans a sixty degree segment in an azimuthal direction of the background scene broadcast upon said 360 degree reflective display screen, each of said background scene cameras having a sync input, and an output;

a target;

first, second, third, fourth, fifth, and sixth target cameras positioned adjacent to said target such that each of said target cameras continuously scans said target, each of said target cameras having a sync input, and an output;

a hexagonal shaped transparent display screen having six rectangular shaped screen elements;

first, second, third, fourth, fifth, and sixth projectors positioned adjacent to the outer surface of said hexagonal shaped transparent display screen so as to allow each of said projectors to broadcast upon one of the six screen elements of said hexagonal shaped transparent display screen one of the sixty degree segments of said background scene and said target for a predetermined time period such that an observer will observe the movement of said target upon said background scene around said hexagonal shaped transparent display screen, each of said first, second, third, fourth, fifth, and sixth projectors having a sync input, a data input, and a blanking signal output;

a master clock signal generator having an output;

a first delay timer, having an input connected to the output of said master clock signal generator and an output connected to the sync input of said first background scene camera;

a first ramp voltage synthesizer circuit having an input connected to the output of said first delay timer and an output connected to the sync input of said first projector;

a second delay timer having an input connected to the output of said master clock signal generator and an output connected to the sync input of said second background scene camera;

a second ramp voltage synthesizer circuit having an input connected to the output of second delay timer and an output connected to the sync input of said second projector;

a third delay timer having an input connected to the output of said master clock signal generator and an output connected to the sync input of said third background scene camera;

a third ramp voltage synthesizer circuit having an input connected to the output of said third delay timer and an output connected to the sync input of said third projector;

a fourth delay timer having an input connected to the output of said master clock signal generator and an output connected to the sync input of said fourth background scene camera;

a fourth ramp voltage synthesizer circuit having an input connected to the output of said fourth delay timer and an output connected to the sync input of said fourth projector;

a fifth delay timer having an input connected to the output of said master clock signal generator and an output connected to the sync input of said fifth background scene camera;

a fifth ramp voltage synthesizer circuit having an input connected to the output of said fifth delay timer and an output connected to the sync input of said fifth projector;

a sixth delay timer having an input connected to the output of said master clock signal generator and an output connected to the sync input of said sixth background scene camera;

a sixth ramp voltage synthesizer circuit having an input connected to the output of said sixth delay timer and an output connected to the sync input of said sixth projector;

a first gated video display circuit having a data input connected to the output of said first target camera, a sync input connected to the output of said first delay timer, a blanking signal input connected to the blanking signal output of said first projector, a control input terminal, and an output;

a first electronic synthesizer circuit having a first data input connected to the output of said first background scene camera, a second data input connected to the output of said first gated video display circuit and an output connected to the data input of said first projector;

a second gated video display circuit having a data input connected to the output of said second target camera, a sync input connected to the output of said second delay timer, a blanking signal input connected to the blanking signal output of said second projector, a control input terminal, and an output;

a second electronic synthesizer circuit having a first data input connected to the output of said second background scene camera, a second data input connected to the output of said second gated video display circuit, and an output connected to the data input of said second projector;

a third gated video display circuit having a data input connected to the output of said third target camera, a sync input connected to the output of third delay timer, a blanking signal input connected to the blanking signal output of said third projector, a control input terminal, and an output;

a third electronic synthesizer circuit having a first data input connected to the output of said third background scene camera, a second data input connected to the output of said third gated video display circuit, and an output connected to the data input of said third projector;

a fourth gated video display circuit having a data input connected to the output of said fourth target camera, a sync input connected to the output of said fourth delay timer, a blanking signal input connected to the blanking signal output of said fourth generator, a control input terminal, and an output;

a fourth electronic synthesizer circuit having a first data input connected to the output of said fourth background scene camera, a second data input connected to the output of said fourth gated video display circuit, and an output connected to the data input of said fourth projector;

a fifth gated video display circuit having a data input connected to the output of said fifth target camera, a sync input connected to the output of said fifth delay timer, a blanking signal input connected to the blanking signal output of said fifth projector, a control input terminal, and an output;

a fifth electronic synthesizer circuit having a first data input connected to the output of said fifth background scene camera, a second data input connected to the output of said fifth gated video display circuit, and an output connected to the data input of said fifth projector;

a sixth gated video display circuit having a data input connected to the output of said sixth target camera, a sync input connected to the output of said sixty delay timer, a blanking signal input connected to the blanking signal output of said sixth projector, a control input terminal, and an output;

a sixth electronic synthesizer circuit having a first data input connect to the output of said sixth background scene camera, a second data input connected to the output of said sixth gated video display circuit, and an output connected to the data input of said sixth projector; and

a digital computer having first, second, third, fourth, fifth, and sixth sync outputs respectively connected to the sync inputs of said first, second, third, fourth, fifth, and sixth target cameras, and a control output terminal effectively connected to the control input terminals of said first, second, third, fourth, fifth, and sixth gated video display circuits.

12. The display apparatus of claim 11 wherein said target comprises a battleship.

13. The display apparatus of claim 11 wherein said target comprises an aircraft.

14. The display apparatus of claim 11 wherein each of said delay timers comprises a monostable multivibrator.

15. The display of claim 11 wherein each of said gated video display circuits comprises:

a first AND gate having first and second inputs, and an output;

a second AND gate having first and second inputs, and an output;

a first OR gate having a first input connected to the output of said first AND gate, a second input connected to the output of said second AND gate, and an output;

a third AND gate having a first input connected to the first input of said first AND gate, a second input, and an output;

a fourth AND gate having a first input connected to the first input of said second AND gate, a second input, and an output;

a second OR gate having a first input connected to the output of said third AND gate, a second input connected to the output of said fourth AND gate, and an output;

an RS flip-flop having a set input connected to the output of said first OR gate, a reset input connected to the output of said second OR gate, and an output;

a fifth AND gate having an input, and an output;

a sixth AND gate having a first input connected to the output of said RS flip-flop, a second input, and an output;

a missing pulse detector having an input connected to the output of said fifth AND gate, and an output connected to the second input of said sixth AND gate;

a first delay comparator having first and second inputs, a first output connected to the second input of said second AND gate and the second input of said third AND gate, and a second output connected to the second input of said first AND gate and the second input of said fourth AND gate;

a second delay comparator having a first input connected to the first input of said first delay comparator, a second input connected to the second input of said first delay comparator, and an output;

a third delay comparator having a first input connected to the second input of said first delay comparator and the second input of said second delay comparator, a second input connected to the first input of said first delay comparator and the first input of said second delay comparator, and an output;

a third OR gate having a first input connected to the output of said sixth AND gate, a second input connected to the output of said second delay comparator, a third input connected to the output of said third delay comparator, a fourth input connected to the input of said fifth AND gate, and an output;

a first NOR gate having an input connected to the output of said third OR gate, and an output;

a second NOR gate having a first input connected to the output of said first NOR gate, a second input, and an output;

a seventh AND gate having a first input connected to the output of said first NOR gate, a second input connected to the second input of said second NOR gate, and an output;

a fourth OR gate having a first input connected to the output of said seventh AND gate, a second input connected to the output of said second NOR gate and an output; and

an inhibit gate having an input connected to the output of said third OR gate.

16. The display apparatus of claim 11 further characterized by a 360 degree annular image transfer apparatus positioned so as to project upon said 360 degree reflective display screen said background scene.