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Circuit arrangement using emitter coupled logic and integrated injection logic

  • US 4,357,548 A
  • Filed: 05/30/1980
  • Issued: 11/02/1982
  • Est. Priority Date: 05/30/1980
  • Status: Expired due to Term
First Claim
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1. A circuit arrangement comprising:

  • first and second terminals for receiving an operating potential therebetween;

    an ECL circuit including first current source means for providing a first current directly connected to said first terminal, first and second transistors connected as an emitter coupled differential amplifier for switching said first current through one of the collector-emitter paths of said first and second transistors, the base electrodes of said first and second transistors being arranged for receiving a differential input potential corresponding to an ECL signal, load means connected between the collector electrode of said first transistor and said second terminal, means for connecting the collector electrode of said second transistor to said second terminal, and means connected to the collector electrode of said first transistor for providing an ECL signal;

    an I2 L circuit including second current means for providing a second current directly connected to said first terminal, a switching transistor, and an injector transistor of opposite conductivity type to said switching transistor, the emitter electrode of said injector transistor being connected to said second terminal, the collector electrode of said injector transistor being connected to the base electrode of said switching transistor and being arranged to receive an input potential corresponding to an I2 L signal, the base electrode of said injector transistor being connected to said second current source, the collector of said switching transistor providing an I2 L signal; and

    interface means for coupling signals between said ECL circuit and said I2 L circuit including an interface circuit for translating ECL signal levels to I2 L signal levels, said interface circuit including third current source means for providing a third current directly connected to said first terminal, third and fourth transistors being connected as an emitter coupled differential amplifier for switching the current provided by said third current source through one of the collector-emitter paths of said third and fourth transistors, the base electrode of one of said third and fourth transistors being connected to the collector electrode of said first transistor of said ECL circuit, the collector electrodes of said third and fourth transistors connected to said second terminal, the collector electrode of one of said third and fourth transistors being connected to the base electrode of said switching transistor of said I2 L circuit.

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