Tamper protection for an automatic remote meter reading unit

• US 4,357,601 A
• Filed: 09/02/1980
• Issued: 11/02/1982
• Est. Priority Date: 09/02/1980
• Status: Expired due to Term

• Current Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Original Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Inventors: McWilliams, Stephen G.
• Primary Examiner(s): Swann, III, Glen R.
• Application Number:
  US06/183,362
• Time in Patent Office: 791 Days
• Field of Search: 340/506, 340/507, 340/512, 340/637, 340/688, 340/870.09, 340/870.02, 340/541, 340/545
• US Class Current: 340/506
• CPC Class Codes: G01R 22/066 Arrangements for avoiding or indicating fraudulent use
• CPC Class Codes: H04M 11/002 with telemetering systems telemetering in general G08C

Abstract

In an automatic remote meter reading system, a tamper protection circuit (101) provides an alarm signal at a central station upon the disconnecting or tampering with a remote utility meter (100). Tamper protection is provided for the meter and for the transmission line carrying energy usage information to a transponder (500) such that any interruptions of the circuit path causes an alarm to be generated. The circuitry includes a remote resistance (132) associated with each meter to be protected. The value of the remote resistance is continually compared with a resistance (110) having a given value within the tamper protection circuit such that for any changes in the value of the remote resistance, an imbalance in the tamper circuit occurs and the alarm signal is generated.

Claims

1. A tamper protection arrangement comprising a resistance element (132), a resistance sensing circuit (101) for detecting changes in the value of the resistance element and providing an alarm signal in respect to the changes in the value of the resistance element characterized in that

the resistance sensing circuit comprises a first transistor (109) connected directly to the resistance element and a second transistor also connected directly to the resistance element, the first transistor being turned on responsive to an increase in the value of the resistance element and the second transistor being turned on responsive to a decrease in the value of the resistance element.

2. The tamper protection arrangement as set forth in claim 1 further characterized in that the resistance element is connected between the base of the first transistor and a reference potential, the emitter of the second transistor also being connected to the base of the first transistor.

3. The tamper protection arrangement of claim 2 further characterized in that the resistance sensing circuit further includes a resistor (110), the value of said resistor being proportional to that of the resistance element so as to bias the first transistor off such that a small change in the base voltage of the first transistor causes it to switch on, the resistor having one side connected to the base of the first transistor and the other side connected to a positive reference potential.

4. The tamper protection arrangement of claim 3 further characterized in that the resistance sensing circuit further includes a diode (114) and a second resistor (112), one side of the diode being connected to the emitter of the first transistor and the other side commonly connected with one side of the second resistor to the base of the second transistor, the other side of the second resistor being connected to the positive reference potential, and the emitter of the first transistor being connected to the reference potential through a third resistor (113).

5. The tamper protection arrangement as set forth in claim 4 further characterized in that the resistance sensing circuit further includes a third transistor (116) having its emitter connected to the positive reference potential and its collector connected through a fourth resistor (118) to the reference potential, the base of the third transistor being coupled to the positive reference potential through a fifth resistor (115) and commonly coupled to the collectors of the first and second transistors for receiving an output representing a change in the value of the resistance element, a voltage reflective of the change in the value of the resistance element being developed across the fifth resistor.

6. The tamper protection arrangement of claim 3 further characterized in that the first transistor is an NPN-type silicon transistor and that the small change in the base voltage is an increase of approximately 3/10 volt.

7. The tamper protection arrangement of claim 2 further characterized in that the resistance sensing circuit further includes a resistor (110), the value of said resistor being proportional to that of the resistance element so as to bias the second transistor off such that a small change in the emitter voltage of the second transistor causes it to switch on.

8. The tamper protection arrangement of claim 7 further characterized in that the second transistor is an NPN-type silicon transistor and that the small change in the emitter voltage is a decrease of approximately 3/10 volt.